{"title":"An Offset-Cancellation Technique Using Charge-Trap Transistors and Asynchronous Programming Scheme","authors":"Ye Lin;Anying Jiang;Jingjing Lv;Yuan Du;Li Du","doi":"10.1109/TCSII.2024.3443421","DOIUrl":null,"url":null,"abstract":"In this brief, a novel offset-cancellation (OC) technique is proposed, utilizing differential pair Charge-Trap Transistors (CTTs) to cancel offset voltage (VOS). The threshold voltage (Vth) degradation of programmed CTTs is characterized and modeled in TSMC 22-nm technology. By utilizing the Vth degradation model of CTTs, an asynchronous programming scheme is proposed to selectively program one of the CTTs based on the differential Vth (\n<inline-formula> <tex-math>$\\Delta $ </tex-math></inline-formula>\nVth) in each programming (PRG) operation of the differential pair CTTs. The experiment shows that the \n<inline-formula> <tex-math>$\\Delta $ </tex-math></inline-formula>\nVth effectively reduces to less than 1mV, and displays negligible retention loss at 27°C and 85°C based on the differential pair CTTs and asynchronous programming scheme.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"71 11","pages":"4638-4642"},"PeriodicalIF":4.0000,"publicationDate":"2024-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems II: Express Briefs","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10636775/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
In this brief, a novel offset-cancellation (OC) technique is proposed, utilizing differential pair Charge-Trap Transistors (CTTs) to cancel offset voltage (VOS). The threshold voltage (Vth) degradation of programmed CTTs is characterized and modeled in TSMC 22-nm technology. By utilizing the Vth degradation model of CTTs, an asynchronous programming scheme is proposed to selectively program one of the CTTs based on the differential Vth (
$\Delta $
Vth) in each programming (PRG) operation of the differential pair CTTs. The experiment shows that the
$\Delta $
Vth effectively reduces to less than 1mV, and displays negligible retention loss at 27°C and 85°C based on the differential pair CTTs and asynchronous programming scheme.
期刊介绍：
TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes:
Circuits: Analog, Digital and Mixed Signal Circuits and Systems
Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic
Circuits and Systems, Power Electronics and Systems
Software for Analog-and-Logic Circuits and Systems
Control aspects of Circuits and Systems.
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