Pub Date : 2025-01-30DOI: 10.1109/TCSII.2025.3529370
{"title":"IEEE Transactions on Circuits and Systems--II: Express Briefs Publication Information","authors":"","doi":"10.1109/TCSII.2025.3529370","DOIUrl":"https://doi.org/10.1109/TCSII.2025.3529370","url":null,"abstract":"","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 2","pages":"C2-C2"},"PeriodicalIF":4.0,"publicationDate":"2025-01-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10858350","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143107085","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-01-30DOI: 10.1109/TCSII.2025.3529372
{"title":"IEEE Circuits and Systems Society Information","authors":"","doi":"10.1109/TCSII.2025.3529372","DOIUrl":"https://doi.org/10.1109/TCSII.2025.3529372","url":null,"abstract":"","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 2","pages":"C3-C3"},"PeriodicalIF":4.0,"publicationDate":"2025-01-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10858347","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143107012","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-01-08DOI: 10.1109/TCSII.2025.3527324
{"title":"2024 Index IEEE Transactions on Circuits and Systems II: Express Briefs Vol. 71","authors":"","doi":"10.1109/TCSII.2025.3527324","DOIUrl":"https://doi.org/10.1109/TCSII.2025.3527324","url":null,"abstract":"","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"71 12","pages":"1-187"},"PeriodicalIF":4.0,"publicationDate":"2025-01-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10834408","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142937907","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-01-06DOI: 10.1109/TCSII.2025.3526145
Safaa Abdelfattah;Hussein M. E. Hussein;Aatmesh Shrivastava;Marvin Onabajo
This brief introduces a digital calibration technique to boost the input impedance of instrumentation amplifiers (IAs) with digitally tunable input impedance. The technique employs two machine learning-driven optimization algorithms, the genetic algorithm (GA) and the particle swarm optimization (PSO) algorithm, to efficiently control integrated capacitor banks within the IA for the determination of the optimal input impedance. These algorithms offer a significant time reduction compared to a calibration with an exhaustive search, reducing calibration time by a factor of over $10^{6}$ (with four 9-bit digital control words) while conserving computational resources. A prototype platform was developed to automatically optimize a fabricated IA test chip designed with 65-nm CMOS technology, which allows to test the machine learning algorithms using a microcontroller to control the digitally tunable input impedance. With an extra input capacitance of 100 pF, the GA algorithm achieved an input impedance of 1.75 G$Omega $ after four generations (iterations), while the PSO algorithm achieved 1.27 G$Omega $ with five iterations.
{"title":"Instrumentation Amplifier Input Impedance Calibration With Machine Learning-Based Optimizations","authors":"Safaa Abdelfattah;Hussein M. E. Hussein;Aatmesh Shrivastava;Marvin Onabajo","doi":"10.1109/TCSII.2025.3526145","DOIUrl":"https://doi.org/10.1109/TCSII.2025.3526145","url":null,"abstract":"This brief introduces a digital calibration technique to boost the input impedance of instrumentation amplifiers (IAs) with digitally tunable input impedance. The technique employs two machine learning-driven optimization algorithms, the genetic algorithm (GA) and the particle swarm optimization (PSO) algorithm, to efficiently control integrated capacitor banks within the IA for the determination of the optimal input impedance. These algorithms offer a significant time reduction compared to a calibration with an exhaustive search, reducing calibration time by a factor of over <inline-formula> <tex-math>$10^{6}$ </tex-math></inline-formula> (with four 9-bit digital control words) while conserving computational resources. A prototype platform was developed to automatically optimize a fabricated IA test chip designed with 65-nm CMOS technology, which allows to test the machine learning algorithms using a microcontroller to control the digitally tunable input impedance. With an extra input capacitance of 100 pF, the GA algorithm achieved an input impedance of 1.75 G<inline-formula> <tex-math>$Omega $ </tex-math></inline-formula> after four generations (iterations), while the PSO algorithm achieved 1.27 G<inline-formula> <tex-math>$Omega $ </tex-math></inline-formula> with five iterations.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 2","pages":"394-398"},"PeriodicalIF":4.0,"publicationDate":"2025-01-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143107013","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-01-01DOI: 10.1109/TCSII.2024.3524556
Xiangxun Zhan;Jun Yin;Rui P. Martins;Pui-In Mak
This brief presents a series-LC-assisted oscillator. By utilizing the series LC, the tank impedance at the oscillation frequency is significantly reduced compared to the conventional parallel LC tank, which contributes to reducing the phase noise (PN). Additionally, large-size cross-coupled transistors should be utilized to maintain the oscillation due to the low tank impedance. This induces a large parasitic capacitance that limits the frequency tuning range (FTR) at high frequencies in the conventional cross-coupled oscillator. In contrast, the presented oscillator can operate above 10 GHz with a sufficient FTR, thanks to the capacitance-boosting capability of the series LC. Fabricated in a 65 nm CMOS process, the oscillator achieves a PN of −140.2 dBc/Hz at 10 MHz offset from a 10.7 GHz carrier, consuming a power consumption of 21 mW, resulting in a figure of merit (FoM) of 187.5 dBc/Hz.
{"title":"A Series-LC-Assisted Oscillator Achieving –140.2 dBc/Hz Phase Noise and 187.5 dBc/Hz FoM at 10 MHz Offset From 10.7 GHz","authors":"Xiangxun Zhan;Jun Yin;Rui P. Martins;Pui-In Mak","doi":"10.1109/TCSII.2024.3524556","DOIUrl":"https://doi.org/10.1109/TCSII.2024.3524556","url":null,"abstract":"This brief presents a series-LC-assisted oscillator. By utilizing the series LC, the tank impedance at the oscillation frequency is significantly reduced compared to the conventional parallel LC tank, which contributes to reducing the phase noise (PN). Additionally, large-size cross-coupled transistors should be utilized to maintain the oscillation due to the low tank impedance. This induces a large parasitic capacitance that limits the frequency tuning range (FTR) at high frequencies in the conventional cross-coupled oscillator. In contrast, the presented oscillator can operate above 10 GHz with a sufficient FTR, thanks to the capacitance-boosting capability of the series LC. Fabricated in a 65 nm CMOS process, the oscillator achieves a PN of −140.2 dBc/Hz at 10 MHz offset from a 10.7 GHz carrier, consuming a power consumption of 21 mW, resulting in a figure of merit (FoM) of 187.5 dBc/Hz.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 2","pages":"389-393"},"PeriodicalIF":4.0,"publicationDate":"2025-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143107009","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-30DOI: 10.1109/TCSII.2024.3523896
Kye-Seok Yoon;Sangwon Kim;Gwangzeen Ko;In-Kui Cho;Seongmin Kim
This brief presents a novel approach to extend the zero voltage switching (ZVS) range in the current-fed parallel resonant converter for wireless power transfer in an automated guided vehicle (AGV). Unlike previous methods that focus on tuning capacitors or inductors, the proposed method is to resonate the matching capacitor with a lumped inductor to enable ZVS in the region where the ZVS condition is not met, which is an LC resonance approach. The power dissipation due to ZVS failure is analyzed, and the proposed method to guarantee ZVS operation is described in detail. The simulated and measured results verified that the proposed method extends the range of ZVS by approximately 242% and achieves an efficiency improvement of up to 10.69% under the same load conditions compared to the conventional method.
{"title":"Extended ZVS Range via LC Resonance in Current-Fed Parallel Resonant Converter for AGV Wireless Power Transfer","authors":"Kye-Seok Yoon;Sangwon Kim;Gwangzeen Ko;In-Kui Cho;Seongmin Kim","doi":"10.1109/TCSII.2024.3523896","DOIUrl":"https://doi.org/10.1109/TCSII.2024.3523896","url":null,"abstract":"This brief presents a novel approach to extend the zero voltage switching (ZVS) range in the current-fed parallel resonant converter for wireless power transfer in an automated guided vehicle (AGV). Unlike previous methods that focus on tuning capacitors or inductors, the proposed method is to resonate the matching capacitor with a lumped inductor to enable ZVS in the region where the ZVS condition is not met, which is an LC resonance approach. The power dissipation due to ZVS failure is analyzed, and the proposed method to guarantee ZVS operation is described in detail. The simulated and measured results verified that the proposed method extends the range of ZVS by approximately 242% and achieves an efficiency improvement of up to 10.69% under the same load conditions compared to the conventional method.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 2","pages":"424-428"},"PeriodicalIF":4.0,"publicationDate":"2024-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143107016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-27DOI: 10.1109/TCSII.2024.3523302
Haiyang Cao;Yongting Deng;Chenhao Zhao;Yiming Shen;Xiufeng Liu;Christopher H. T. Lee
In order to enhance the position estimation accuracy of sensorless control of permanent magnet synchronous motor (PMSM), this brief proposes an improved super-twisting observer (STO) combined with a novel position compensation phase-locked loop (PLL) scheme. In this sensorless technology, the improved STO is designed using linear and nonlinear correction terms to achieve precise reconstruction of back electrimotive force (EMF) and finite-time convergence. With the back-EMF accurately estimated, the position compensation PLL is presented to alleviate the position error introduced by the speed acceleration and deceleration ramps when extracting position and speed information. Ultimately, the experimental comparisons on a 0.75-kW PMSM drive reveal that the proposed sensorless scheme has superior position estimation accuracy in both speed dynamics and steady state compared with the conventional schemes.
{"title":"Enhanced Position Estimation Accuracy Based on Improved Super-Twisting Observer and Position Compensation PLL for PMSM Sensorless Control","authors":"Haiyang Cao;Yongting Deng;Chenhao Zhao;Yiming Shen;Xiufeng Liu;Christopher H. T. Lee","doi":"10.1109/TCSII.2024.3523302","DOIUrl":"https://doi.org/10.1109/TCSII.2024.3523302","url":null,"abstract":"In order to enhance the position estimation accuracy of sensorless control of permanent magnet synchronous motor (PMSM), this brief proposes an improved super-twisting observer (STO) combined with a novel position compensation phase-locked loop (PLL) scheme. In this sensorless technology, the improved STO is designed using linear and nonlinear correction terms to achieve precise reconstruction of back electrimotive force (EMF) and finite-time convergence. With the back-EMF accurately estimated, the position compensation PLL is presented to alleviate the position error introduced by the speed acceleration and deceleration ramps when extracting position and speed information. Ultimately, the experimental comparisons on a 0.75-kW PMSM drive reveal that the proposed sensorless scheme has superior position estimation accuracy in both speed dynamics and steady state compared with the conventional schemes.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 2","pages":"414-418"},"PeriodicalIF":4.0,"publicationDate":"2024-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143107014","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-26DOI: 10.1109/TCSII.2024.3522913
Wei Yu;Dongyuan Lin;Yunfei Zheng;Shiyuan Wang
Uncertainties in nonlinear systems can significantly hinder the effectiveness of traditional filtering methods, leading to suboptimal state estimation and compromising overall performance and robustness. Therefore, an extended H$_{infty }$ filtering based on reproducing kernel Hilbert space (RKHS) is proposed for addressing the state estimation issue existing in the nonlinear system with uncertainty in this brief. In particular, this extended H$_{infty }$ filtering is derived in RKHS by using conditional embedding operator and a robust optimization framework. In addition, it employs an adaptive kernel size method to enhance the model’s generalization capability. Moreover, an online sampling method based on Nyström approach is utilized to reduce computational complexity. Simulation results in chaotic time series prediction and SOC estimation demonstrate that the proposed algorithm outperforms the other competitive algorithms.
{"title":"Extended H∞ Filtering in RKHS for Nonlinear Systems With Uncertainty","authors":"Wei Yu;Dongyuan Lin;Yunfei Zheng;Shiyuan Wang","doi":"10.1109/TCSII.2024.3522913","DOIUrl":"https://doi.org/10.1109/TCSII.2024.3522913","url":null,"abstract":"Uncertainties in nonlinear systems can significantly hinder the effectiveness of traditional filtering methods, leading to suboptimal state estimation and compromising overall performance and robustness. Therefore, an extended H<inline-formula> <tex-math>$_{infty }$ </tex-math></inline-formula> filtering based on reproducing kernel Hilbert space (RKHS) is proposed for addressing the state estimation issue existing in the nonlinear system with uncertainty in this brief. In particular, this extended H<inline-formula> <tex-math>$_{infty }$ </tex-math></inline-formula> filtering is derived in RKHS by using conditional embedding operator and a robust optimization framework. In addition, it employs an adaptive kernel size method to enhance the model’s generalization capability. Moreover, an online sampling method based on Nyström approach is utilized to reduce computational complexity. Simulation results in chaotic time series prediction and SOC estimation demonstrate that the proposed algorithm outperforms the other competitive algorithms.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 2","pages":"429-433"},"PeriodicalIF":4.0,"publicationDate":"2024-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143107019","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A dynamic comparator reset scheme based on the flying capacitor is proposed. The reset power used to charge the integration nodes of the comparator is nearly halved by exploiting the existent integration capacitors with only a single D-flip-flop and few switches. The proposed reset scheme improves the energy efficiency while the small CLK-OUT delay of the dynamic comparator is maintained. The prototype comparators with the conventional or the proposed reset scheme are fabricated in a 22-nm bulk CMOS process. The measurement results of the delay, input-referred noise, and energy consumption show that the flying-capacitor-based reset scheme boosts the overall performance of both the conventional StrongARM and Elzakker’s comparator by about 1.8-times.
{"title":"A Flying-Capacitor-Based Reset Scheme for Low Power Dynamic Comparator","authors":"Kwok Cheong Li;Xinhang Xu;Jihang Gao;Siyuan Ye;Jiajia Cui;Yacong Zhang;Ru Huang;Linxiao Shen","doi":"10.1109/TCSII.2024.3522282","DOIUrl":"https://doi.org/10.1109/TCSII.2024.3522282","url":null,"abstract":"A dynamic comparator reset scheme based on the flying capacitor is proposed. The reset power used to charge the integration nodes of the comparator is nearly halved by exploiting the existent integration capacitors with only a single D-flip-flop and few switches. The proposed reset scheme improves the energy efficiency while the small CLK-OUT delay of the dynamic comparator is maintained. The prototype comparators with the conventional or the proposed reset scheme are fabricated in a 22-nm bulk CMOS process. The measurement results of the delay, input-referred noise, and energy consumption show that the flying-capacitor-based reset scheme boosts the overall performance of both the conventional StrongARM and Elzakker’s comparator by about 1.8-times.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 2","pages":"384-388"},"PeriodicalIF":4.0,"publicationDate":"2024-12-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143107088","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-24DOI: 10.1109/TCSII.2024.3513179
{"title":"IEEE Circuits and Systems Society Information","authors":"","doi":"10.1109/TCSII.2024.3513179","DOIUrl":"https://doi.org/10.1109/TCSII.2024.3513179","url":null,"abstract":"","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 1","pages":"C3-C3"},"PeriodicalIF":4.0,"publicationDate":"2024-12-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10814108","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142890218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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