An N/PBTI-Isolated BTI Monitor With a Configurable Switching Network and Calibration for Process Variation in Memory Periphery

Abstract

This brief presents an on-chip bias temperature instability (BTI) monitor to accurately detect performance degradation caused by negative BTI (NBTI) and positive BTI (PBTI) in DRAM periphery. The proposed BTI monitor is capable of isolated measurement of both NBTI and PBTI using a configurable pull-up and pull-down switching network. The dual-delay line topology also ensures fast measurement to minimize unwanted BTI recovery, which reduces measurement accuracy. In addition, a calibration scheme for process variation is proposed using body biasing of devices that mimics BTI-induced stress to further enhance measurement accuracy.