{"title":"Modification of Interface Quality and Electrical Performance of ErSmO/InP Gate-Stacks by ALD-Driven HfAlOx Interlayers","authors":"Jinyu Lu;Gang He;Li Cheng;Bing Yang;Shanshan Jiang","doi":"10.1109/TED.2024.3446755","DOIUrl":null,"url":null,"abstract":"This brief presents the effect of atomic layer deposition (ALD)-fabricated HfAlO\n<italic><sub>x</sub></i>\n gate-stacks on the interfacial chemistry and electrical properties of sputtered ErSmO/InP metal-oxide–semiconductor (MOS) capacitors. The ErSmO/HfAlO\n<italic><sub>x</sub></i>\n (1:2)/InP gate-stack displays the best electrical performance with a dielectric constant of 14.66, an interface state density (\n<inline-formula> <tex-math>${D} _{\\textit {it}}$ </tex-math></inline-formula>\n) of \n<inline-formula> <tex-math>$5.48\\times 10^{{11}}$ </tex-math></inline-formula>\n eV\n<inline-formula> <tex-math>$^{-}1 $ </tex-math></inline-formula>\ncm\n<inline-formula> <tex-math>$^{-}2 $ </tex-math></inline-formula>\n, a reduction in the electron effective mass of \n<inline-formula> <tex-math>$0.03~{m} _{{0}}$ </tex-math></inline-formula>\n, and an increase in barrier height to 0.97 eV. InP-MOS capacitors were systematically analyzed under temperature-dependent conditions to ascertain the transition of conduction mechanisms. In particular, trap density level in InP-MOS capacitors has been investigated based on low-frequency noise (LFN) measurements. The development of gate-stacks indicates an avenue for next-generation MOS field-effect transistors (MOSFETs).","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"71 10","pages":"6465-6468"},"PeriodicalIF":3.2000,"publicationDate":"2024-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electron Devices","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10648955/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This brief presents the effect of atomic layer deposition (ALD)-fabricated HfAlO
x
gate-stacks on the interfacial chemistry and electrical properties of sputtered ErSmO/InP metal-oxide–semiconductor (MOS) capacitors. The ErSmO/HfAlO
x
(1:2)/InP gate-stack displays the best electrical performance with a dielectric constant of 14.66, an interface state density (
${D} _{\textit {it}}$
) of
$5.48\times 10^{{11}}$
eV
$^{-}1 $
cm
$^{-}2 $
, a reduction in the electron effective mass of
$0.03~{m} _{{0}}$
, and an increase in barrier height to 0.97 eV. InP-MOS capacitors were systematically analyzed under temperature-dependent conditions to ascertain the transition of conduction mechanisms. In particular, trap density level in InP-MOS capacitors has been investigated based on low-frequency noise (LFN) measurements. The development of gate-stacks indicates an avenue for next-generation MOS field-effect transistors (MOSFETs).
期刊介绍:
IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.