Simulation Study on Comparison of “Inside-Channel” and “On-Dielectric” Source Contact Modifications on the Performance of the Vertical Organic Field Effect Transistors
{"title":"Simulation Study on Comparison of “Inside-Channel” and “On-Dielectric” Source Contact Modifications on the Performance of the Vertical Organic Field Effect Transistors","authors":"Sirsendu Ghosh;Ramesh Singh Bisht;Pramod Kumar","doi":"10.1109/TED.2024.3442188","DOIUrl":null,"url":null,"abstract":"The channel length in vertical organic field effect transistors (VOFETs) is defined by the organic semiconductor (OSC) thin film thickness that can be in the nanometer range, which allows it to operate at low voltages, hence reducing the power consumption. The reduced channel length also leads to a much higher OFF-state current, and this can increase power leakage and deteriorate the performance, and hence, OFF-state current must be reduced using the modification of the VOFET structure. To address the high OFF-state current issue, modifications on the perforated source contact are explored using simulation studies. In geometrical modifications, the two structures viz. “on-dielectric” (OD) and “inside-channel” (IC) source contacts are compared, where the “OD” source contact is on the gate oxide layer, whereas “IC” source contact denotes an underlying OSC layer. The simulation results show that for optimized conditions, the “OD” source contact performed better than the “IC” source contact. The source contacts are further modified with insulating layers to improve the ON/OFF ratio and subthreshold swing (SS) in both geometries. The results suggest that reducing the thickness of the buried OSC layer in the “IC” contact configuration with top and side walls of source contact coated with insulator leads to the best performance having an ON/OFF ratio \n<inline-formula> <tex-math>$\\sim 10^{{8}}$ </tex-math></inline-formula>\n and SS 141 mV/decade. The improvements occur as the charge carrier injection takes place from the bottom side of the contact, and hence, the applied gate voltage can provide better control over the injection barrier due to the direct in-sight position of the source injection region.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":null,"pages":null},"PeriodicalIF":2.9000,"publicationDate":"2024-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electron Devices","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10645818/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
The channel length in vertical organic field effect transistors (VOFETs) is defined by the organic semiconductor (OSC) thin film thickness that can be in the nanometer range, which allows it to operate at low voltages, hence reducing the power consumption. The reduced channel length also leads to a much higher OFF-state current, and this can increase power leakage and deteriorate the performance, and hence, OFF-state current must be reduced using the modification of the VOFET structure. To address the high OFF-state current issue, modifications on the perforated source contact are explored using simulation studies. In geometrical modifications, the two structures viz. “on-dielectric” (OD) and “inside-channel” (IC) source contacts are compared, where the “OD” source contact is on the gate oxide layer, whereas “IC” source contact denotes an underlying OSC layer. The simulation results show that for optimized conditions, the “OD” source contact performed better than the “IC” source contact. The source contacts are further modified with insulating layers to improve the ON/OFF ratio and subthreshold swing (SS) in both geometries. The results suggest that reducing the thickness of the buried OSC layer in the “IC” contact configuration with top and side walls of source contact coated with insulator leads to the best performance having an ON/OFF ratio
$\sim 10^{{8}}$
and SS 141 mV/decade. The improvements occur as the charge carrier injection takes place from the bottom side of the contact, and hence, the applied gate voltage can provide better control over the injection barrier due to the direct in-sight position of the source injection region.
期刊介绍:
IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.