Hybrid p-GaN/MIS Gate HEMT Suppressing Drain-Induced Dynamic Threshold Voltage Instability

IF 4.1 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Electron Device Letters Pub Date : 2024-08-23 DOI:10.1109/LED.2024.3448362
Chen Wang;Jinyan Wang;Xin Wang;Ziheng Liu;Jiayin He;Ju Gao;Chengkang Ao;Maojun Wang;Jin Wei
{"title":"Hybrid p-GaN/MIS Gate HEMT Suppressing Drain-Induced Dynamic Threshold Voltage Instability","authors":"Chen Wang;Jinyan Wang;Xin Wang;Ziheng Liu;Jiayin He;Ju Gao;Chengkang Ao;Maojun Wang;Jin Wei","doi":"10.1109/LED.2024.3448362","DOIUrl":null,"url":null,"abstract":"This letter demonstrates a hybrid p-GaN/MIS gate HEMT (HG-HEMT) to suppress the drain-induced dynamic threshold voltage (\n<inline-formula> <tex-math>${V}_{\\text {th}}\\text {)}$ </tex-math></inline-formula>\n instability. By implementing a depletion-mode (D-mode) MIS gate adjacent to Schottky-type p-GaN gate, the drain-induced bidirectional shift of dynamic \n<inline-formula> <tex-math>${V}_{\\text {th}}$ </tex-math></inline-formula>\n is significantly reduced. The fabricated HG-HEMT exhibits decent performances compared to the conventional Schottky-type p-GaN gate HEMT (Conv-HEMT), with saturation current (\n<inline-formula> <tex-math>${I}_{\\text {D, {sat}}}\\text {)}$ </tex-math></inline-formula>\n of 345 mA/mm, on-resistance (\n<inline-formula> <tex-math>${R}_{\\text {ON}}\\text {)}$ </tex-math></inline-formula>\n of \n<inline-formula> <tex-math>$13.2~\\Omega \\cdot $ </tex-math></inline-formula>\n mm, and hard breakdown voltage (\n<italic>BV</i>\n) of 1315 V, which are similar to the Conv-HEMT. The HG-HEMT demonstrates significantly improved dynamic \n<inline-formula> <tex-math>${V}_{\\text {th}}$ </tex-math></inline-formula>\n stability under drain bias, with a negligible dynamic \n<inline-formula> <tex-math>${V}_{\\text {th}}$ </tex-math></inline-formula>\n shift at on-state drain bias of 50 V, and a small positive dynamic \n<inline-formula> <tex-math>${V}_{\\text {th}}$ </tex-math></inline-formula>\n shift of +0.05 V after off-state drain bias of 400 V. As a comparison, \n<inline-formula> <tex-math>${V}_{\\text {th}}$ </tex-math></inline-formula>\n shifts of the Conv-HEMT are −0.28 V and +0.42 V, respectively. The improved dynamic \n<inline-formula> <tex-math>${V}_{\\text {th}}$ </tex-math></inline-formula>\n stability of the HG-HEMT is owing to a D-mode MIS-gate region that shields the interplay between drain and the p-GaN region. The proposed HG-HEMT paves the way for highly stable GaN power electronics applications.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"45 10","pages":"1732-1735"},"PeriodicalIF":4.1000,"publicationDate":"2024-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Electron Device Letters","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10644097/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
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Abstract

This letter demonstrates a hybrid p-GaN/MIS gate HEMT (HG-HEMT) to suppress the drain-induced dynamic threshold voltage ( ${V}_{\text {th}}\text {)}$ instability. By implementing a depletion-mode (D-mode) MIS gate adjacent to Schottky-type p-GaN gate, the drain-induced bidirectional shift of dynamic ${V}_{\text {th}}$ is significantly reduced. The fabricated HG-HEMT exhibits decent performances compared to the conventional Schottky-type p-GaN gate HEMT (Conv-HEMT), with saturation current ( ${I}_{\text {D, {sat}}}\text {)}$ of 345 mA/mm, on-resistance ( ${R}_{\text {ON}}\text {)}$ of $13.2~\Omega \cdot $ mm, and hard breakdown voltage ( BV ) of 1315 V, which are similar to the Conv-HEMT. The HG-HEMT demonstrates significantly improved dynamic ${V}_{\text {th}}$ stability under drain bias, with a negligible dynamic ${V}_{\text {th}}$ shift at on-state drain bias of 50 V, and a small positive dynamic ${V}_{\text {th}}$ shift of +0.05 V after off-state drain bias of 400 V. As a comparison, ${V}_{\text {th}}$ shifts of the Conv-HEMT are −0.28 V and +0.42 V, respectively. The improved dynamic ${V}_{\text {th}}$ stability of the HG-HEMT is owing to a D-mode MIS-gate region that shields the interplay between drain and the p-GaN region. The proposed HG-HEMT paves the way for highly stable GaN power electronics applications.
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抑制漏极引起的动态阈值电压不稳定性的 p-GaN/MIS 门混合 HEMT
这封信展示了一种混合 p-GaN/MIS 栅极 HEMT(HG-HEMT),用于抑制漏极引起的动态阈值电压(${V}_{text {th}}\text {)}$不稳定性。通过在肖特基型 p-GaN 栅极旁边实施一个耗尽模式(D-mode)MIS 栅极,漏极引起的动态 ${V}_{text {th}}$ 双向偏移显著降低。与传统的肖特基型 p-GaN 栅极 HEMT(Conv-HEMT)相比,制备的 HG-HEMT 具有良好的性能,其饱和电流(${I}_{text {D, {sat}}}\text {)}$为 345 mA/mm,导通电阻(${R}_{text {ON}}\text {)}$为 13.2~\Omega \cdot $ mm,硬击穿电压(BV)为 1315 V,与 Conv-HEMT 相似。HG-HEMT 显著提高了漏极偏压下的动态 ${V}_{text {th}}$ 稳定性,在通态漏极偏压为 50 V 时,动态 ${V}_{text {th}}$ 漂移可以忽略不计,而在离态漏极偏压为 400 V 时,动态 ${V}_{text {th}}$ 漂移为 +0.05 V。相比之下,Conv-HEMT 的 ${V}_{text {th}}$ 漂移分别为 -0.28 V 和 +0.42 V。HG-HEMT 动态 ${V}_{text {th}}$ 稳定性的提高归功于 D 模式 MIS 栅极区域,它屏蔽了漏极和 p-GaN 区域之间的相互作用。所提出的 HG-HEMT 为高度稳定的 GaN 功率电子应用铺平了道路。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Electron Device Letters
IEEE Electron Device Letters 工程技术-工程:电子与电气
CiteScore
8.20
自引率
10.20%
发文量
551
审稿时长
1.4 months
期刊介绍: IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.
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Table of Contents Front Cover IEEE Electron Device Letters Publication Information IEEE Electron Device Letters Information for Authors Special Issue on Intelligent Sensor Systems for the IEEE Journal of Electron Devices
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