Integrated electrical silicon interconnects for short-range high-speed millimeter-wave and terahertz communications

IF 2.2 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE Integration-The Vlsi Journal Pub Date : 2024-08-31 DOI:10.1016/j.vlsi.2024.102267
{"title":"Integrated electrical silicon interconnects for short-range high-speed millimeter-wave and terahertz communications","authors":"","doi":"10.1016/j.vlsi.2024.102267","DOIUrl":null,"url":null,"abstract":"<div><p>—Millimeter-wave and terahertz interconnects implemented in advanced complementary metal oxide semiconductor (CMOS) technologies have emerged as promising solutions to fix the issues encountered by baseband interconnects and optical interconnects across specific communication ranges. Over the last decade, significant attempts to advance millimeter-wave and terahertz electronics and platforms have been made. Notably, there have been ground-breaking advancements in active components, including modulation techniques, low-noise receivers, efficient and high-output-power signal generators, and high-frequency clock synthesizers. Nevertheless, since energy efficiency is of paramount importance for interconnect applications, it is necessary to prioritize efficiency enhancements over improvements in signal power, signal integrity and noise related performance. Strategies to improve system output power and phase noise as well as strategies to reduce channel loss and channel electromagnetic crosstalk should leverage alternative approaches, such as architectural optimizations and array configurations, rather than prioritizing energy efficiency. As such, the progression of passive channel technology is equally vital. While reducing channel insertion loss is essential for extending communication reach, channel dispersion and crosstalk limitations at the interface level present critical challenges to achieving optimal bandwidth over distances of up to a few meters. This underscores the need for a balanced focus on both active and passive component innovations to fully harness the potential of millimeter-wave and terahertz interconnects in overcoming the limitations of current CMOS technologies.</p></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":null,"pages":null},"PeriodicalIF":2.2000,"publicationDate":"2024-08-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926024001317","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
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Abstract

—Millimeter-wave and terahertz interconnects implemented in advanced complementary metal oxide semiconductor (CMOS) technologies have emerged as promising solutions to fix the issues encountered by baseband interconnects and optical interconnects across specific communication ranges. Over the last decade, significant attempts to advance millimeter-wave and terahertz electronics and platforms have been made. Notably, there have been ground-breaking advancements in active components, including modulation techniques, low-noise receivers, efficient and high-output-power signal generators, and high-frequency clock synthesizers. Nevertheless, since energy efficiency is of paramount importance for interconnect applications, it is necessary to prioritize efficiency enhancements over improvements in signal power, signal integrity and noise related performance. Strategies to improve system output power and phase noise as well as strategies to reduce channel loss and channel electromagnetic crosstalk should leverage alternative approaches, such as architectural optimizations and array configurations, rather than prioritizing energy efficiency. As such, the progression of passive channel technology is equally vital. While reducing channel insertion loss is essential for extending communication reach, channel dispersion and crosstalk limitations at the interface level present critical challenges to achieving optimal bandwidth over distances of up to a few meters. This underscores the need for a balanced focus on both active and passive component innovations to fully harness the potential of millimeter-wave and terahertz interconnects in overcoming the limitations of current CMOS technologies.

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用于短程高速毫米波和太赫兹通信的集成电子硅互连器件
-采用先进的互补金属氧化物半导体(CMOS)技术实现的毫米波和太赫兹互连已成为解决基带互连和光互连在特定通信范围内遇到的问题的有前途的解决方案。在过去十年中,人们为推动毫米波和太赫兹电子技术和平台的发展做出了重大尝试。值得注意的是,有源元件取得了突破性进展,包括调制技术、低噪声接收器、高效和高输出功率信号发生器以及高频时钟合成器。然而,由于能效对互连应用至关重要,因此有必要优先提高能效,而不是改善信号功率、信号完整性和噪声相关性能。改善系统输出功率和相位噪声的策略,以及降低通道损耗和通道电磁串扰的策略,都应采用其他方法,如架构优化和阵列配置,而不是优先考虑能效。因此,无源信道技术的发展同样至关重要。虽然降低信道插入损耗对扩大通信覆盖范围至关重要,但接口层面的信道色散和串扰限制对实现最远几米的最佳带宽提出了严峻挑战。这突出表明,要充分利用毫米波和太赫兹互连的潜力,克服当前 CMOS 技术的局限性,就必须均衡地关注有源和无源元件的创新。
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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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