On-chip photoelectric hybrid convolutional accelerator based on Bragg grating array

Abstract

We propose an on-chip photoelectric hybrid convolution accelerator based on Bragg grating array. The weight of the convolution kernel can be adjusted by controlling the central wavelengths of the Bragg grating array. We conducted simulation verification of the functionality and scalability of this on-chip photoelectric hybrid convolution accelerator. Subsequently, we constructed a neural network model to conduct handwritten digit classification simulations using this accelerator, achieving a simulation accuracy of 93.99%. Finally, the concept of the proposed on-chip photoelectric hybrid convolution accelerator is successfully verified. Due to the merits of Bragg grating, the proposed scheme paves the way for realizing high-performance on-chip optical neural networks.