Cracking in semiconductor devices–effect of plasticity under triaxial constraint

Abstract

A semiconductor device integrates dissimilar materials of small sizes and complex geometries. During fabrication, the materials are deposited at various temperatures. Both deposition and change in temperature cause stresses in the materials. Under the stresses, ductile materials may deform plastically, and brittle materials may crack. Here we focus on how plastic deformation in the ductile materials affects cracking in nearby brittle materials. We study a model structure in which a metal line is encased by a silicon substrate and a brittle oxide layer. In the triaxially constrained metal, the stresses readily exceed the yield strength of the metal. Such high stresses in the metal elevate the stresses in the oxide. The degree of triaxial constraint varies with the aspect ratio of the metal. We compute the stress in the oxide, as well as the energy release rate of an edge crack and a long channel crack. We discuss strategies to avert cracking in the oxide.