ATOM: An Automatic Topology Synthesis Framework for Operational Amplifiers

IF 2.9 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Pub Date : 2024-09-18 DOI:10.1109/TCAD.2024.3463534
Jinyi Shen;Fan Yang;Li Shang;Changhao Yan;Zhaori Bi;Dian Zhou;Xuan Zeng
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Abstract

Bayesian optimization (BO) is more efficient in automatically synthesizing operational amplifier (opamp) topologies compared to conventional methods. However, the design space for behavior-level opamp topologies involves numerous connections that are difficult to comprehend, and evaluating each topology incurs substantial computational costs. To tackle these challenges, this brief introduces ATOM, an automatic opamp topology synthesis framework. We construct a concise design space for behavior-level opamp topologies, consisting of topologies that designers can easily understand. We propose an opamp topology optimization method that incorporates freeze-thaw BO. This method efficiently explores the design space and expedites the evaluation process. Experimental studies demonstrate that ATOM outperforms state-of-the-art topology synthesis methods in terms of success rate and optimization results while reducing the number of required simulations by up to 8.15 times. The source code for ATOM is available at https://github.com/Jinyi-Shen/ATOM.
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ATOM: 运算放大器拓扑自动合成框架
与传统方法相比,贝叶斯优化(BO)在自动合成运算放大器(opamp)拓扑方面效率更高。然而,行为级opamp拓扑的设计空间涉及许多难以理解的连接,并且评估每个拓扑都会产生大量的计算成本。为了应对这些挑战,本文简要介绍ATOM,一种自动运放拓扑合成框架。我们为行为级opamp拓扑构建了一个简洁的设计空间,由设计师可以容易理解的拓扑组成。提出了一种结合冻融BO的运放大器拓扑优化方法。该方法有效地探索了设计空间,加快了评估过程。实验研究表明,ATOM在成功率和优化结果方面优于最先进的拓扑综合方法,同时将所需的模拟次数减少了8.15倍。ATOM的源代码可从https://github.com/Jinyi-Shen/ATOM获得。
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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