A 10.23-Bit ENOB 1 kS/s Differential VCO-Based ADC With Resistive Input Stage in Low-Temperature Poly-Silicon TFT Technology

Abstract

This brief proposes an analog-to-digital converter (ADC) based on a low-temperature polycrystalline silicon (LTPS) thin film transistor (TFT) process. A Voltage Controlled Oscillator (VCO)-based structure is employed to tolerate the process uncertainty. A key challenge in VCO-based ADCs is the non-linearity issue of the VCO. To address this, this brief presents a pseudo-differential architecture with resistive input stage, which significantly suppresses the 2nd and 3rd harmonics and thus improves the linearity. The proposed ADC is fabricated using a 3- $\mu $ m mass-production LTPS process. It achieves a 10.23-bit ENOB at 1 kS/s and 8.22-bit ENOB at 16 kS/s. The FOMW of this brief is $24\times $ better than the state-of-the-art ADCs in IGZO technology and $2\times $ better than the best simulation result in LTPS technology. Under extreme PVT variations, proposed ADC can still maintain minor performance changes. We also demonstrate the successful acquisition and reconstruction of ECG signal.