{"title":"Innovative feedback approach for high-performance low-voltage current mirror","authors":"Astha Dadheech, Nikhil Raj, Divyang Rawal","doi":"10.1016/j.vlsi.2024.102283","DOIUrl":null,"url":null,"abstract":"<div><p>The paper presents an approach to increase the performance in terms of input and output resistance of a low voltage flipped voltage follower (FVF) based current mirror. The proposed technique consists of substituting the main output transistor with a network of transistors in a feedback arrangement, designed to improve the output resistance. Furthermore, a low saturation onset transistor approach is used to improve the performance. Such an approach also helped in reducing the input resistance of the current mirror, which ranges in ohms. A wide current range of up to 1 mA is achieved at a minimal current transfer error of 0.38 %. This feedback mechanism-based current mirror exhibits an output resistance of 29.61 GΩ, an input resistance of 30.45 Ω, and a bandwidth of 1.464 GHz. The proposed current mirror runs on ±0.5 V supply voltage. The robustness of the proposed circuit is evaluated through process corner analysis, temperature mismatch assessment, and Monte-Carlo simulations. The performance characteristics of the proposed current mirror have been validated and simulated using Cadence Virtuoso and Spectre simulations on 0.18 μm UMC technology. The validation process included both pre-layout and post-layout simulation results.</p></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"100 ","pages":"Article 102283"},"PeriodicalIF":2.2000,"publicationDate":"2024-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926024001470","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
The paper presents an approach to increase the performance in terms of input and output resistance of a low voltage flipped voltage follower (FVF) based current mirror. The proposed technique consists of substituting the main output transistor with a network of transistors in a feedback arrangement, designed to improve the output resistance. Furthermore, a low saturation onset transistor approach is used to improve the performance. Such an approach also helped in reducing the input resistance of the current mirror, which ranges in ohms. A wide current range of up to 1 mA is achieved at a minimal current transfer error of 0.38 %. This feedback mechanism-based current mirror exhibits an output resistance of 29.61 GΩ, an input resistance of 30.45 Ω, and a bandwidth of 1.464 GHz. The proposed current mirror runs on ±0.5 V supply voltage. The robustness of the proposed circuit is evaluated through process corner analysis, temperature mismatch assessment, and Monte-Carlo simulations. The performance characteristics of the proposed current mirror have been validated and simulated using Cadence Virtuoso and Spectre simulations on 0.18 μm UMC technology. The validation process included both pre-layout and post-layout simulation results.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.