An FPGA Integrated 2D Graphic Processor for Enhanced Digital Design and Computer Architecture Education

Abstract

In the rapidly evolving domain of technology education, the integration of digital systems and computer architecture into a unified academic curriculum has become increasingly important. This integration reflects the dynamic nature of the technological landscape and aligns with the growing demands and expectations of students pursuing competencies in both disciplines. Within this context, there is an urgent need for innovative and disruptive pedagogical tools that are in line with current educational trends and effectively address the different learning styles of students. Consequently, the adoption of Field Programmable Gate Array (FPGA) co-design approaches, which integrate hardware and software aspects of systems, represents a significant step forward in meeting the contemporary demands of computer architecture education, offering a practical, engaging and scalable solution. This paper introduces CoLenda, a novel learning tool, through the implementation of an educational FPGA platform based on a 2D graphics processor. The aim of CoLenda is to provide a comprehensive understanding of its architecture, enabling students to experience practical, hands-on learning through the development of graphics-based games. The introduction of this processor enhances the learning process by allowing students to engage in digital design and computer architecture curricula while fostering creativity and practical problem-solving skills. Additionally, making the project open-source for community contributions could significantly expand the potential and scope of this educational tool.