{"title":"Design of a Fully Integrated Power Amplifier at Ka-V Band for 5G Transceivers","authors":"Avinash Singh;Amit Singh;Bargaje Ganesh Pandurang;Karun Rawat","doi":"10.1109/JMW.2024.3449421","DOIUrl":null,"url":null,"abstract":"A fully integrated millimeter-wave power amplifier has been designed and fabricated using a 0.13 μm SiGe BiCMOS process technology. The design is based on extracting device parasitics and utilizing them in a matching network based on a bandpass topology. This design technique assisted in attaining a wideband performance without using any on-chip inductors or transformers. The amplifier operates over the \n<italic>Ka</i>\n & \n<italic>V</i>\n-band ranging from 36 GHz to 53 GHz with a peak saturated power of 17.7 dBm, peak power added efficiency (PAE) of 20.5% and a gain of 19.7 dB at 46 GHz. The performance is also validated with wideband 5G signals of 50 MHz and 100 MHz channel bandwidth using 64-QAM in n262 5G NR FR2 bands (47.2 GHz–48.2 GHz). The digital predistortion is used to linearize the PA in order to qualify the required spectral mask with an error vector magnitude of 2.2%. The proposed design is compact and occupies a chip area of 1.11 mm\n<sup>2</sup>\n, including the pads.","PeriodicalId":93296,"journal":{"name":"IEEE journal of microwaves","volume":"4 4","pages":"742-748"},"PeriodicalIF":6.9000,"publicationDate":"2024-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10671575","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE journal of microwaves","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10671575/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
A fully integrated millimeter-wave power amplifier has been designed and fabricated using a 0.13 μm SiGe BiCMOS process technology. The design is based on extracting device parasitics and utilizing them in a matching network based on a bandpass topology. This design technique assisted in attaining a wideband performance without using any on-chip inductors or transformers. The amplifier operates over the
Ka
&
V
-band ranging from 36 GHz to 53 GHz with a peak saturated power of 17.7 dBm, peak power added efficiency (PAE) of 20.5% and a gain of 19.7 dB at 46 GHz. The performance is also validated with wideband 5G signals of 50 MHz and 100 MHz channel bandwidth using 64-QAM in n262 5G NR FR2 bands (47.2 GHz–48.2 GHz). The digital predistortion is used to linearize the PA in order to qualify the required spectral mask with an error vector magnitude of 2.2%. The proposed design is compact and occupies a chip area of 1.11 mm
2
, including the pads.