Twice-input variable-resolution single-side switching scheme without reset energy for SAR ADC

Abstract

A twice-input variable-resolution single-side switching scheme without reset energy is proposed for successive approximation register (SAR) analogue-to-digital converters (ADCs). The proposed switching scheme is based on semi-resting DAC technology to design a four-array architecture capable of handling twice the swing of the signal input while reducing the capacitor array size. The technique of top-plate sampling and monotonic shift is utilized so that no switching energy is generated for the first three comparisons. The proposed scheme utilizes full-capacitor split, bridged switch, and C-2C dummy capacitor technology, which reduces average switching energy consumption by 99.8% compared to conventional schemes and enables ADC variable resolution function, making the SAR ADC more suitable for IoT applications.