Synergistic Effects of Deposition Temperatures for Active and Gate Insulator of Top-Gate Thin-Film Transistors Using InGaZnO Channels Prepared by Thermal Atomic-Layer Deposition

Abstract

The synergistic impact of deposition temperature conditions for the InGaZnO (IGZO) and gate insulator (GI) layers during the thermal atomic-layer deposition process on the device performance and operational reliability was examined for the top-gate thin-film transistors (TFTs). The Ga increased with an increase in the channel deposition temperature and did not change significantly following the GI deposition process. Prior to the postannealing process, the transfer characteristics of the devices were predominantly influenced by the GI deposition temperature. Following the postannealing process, however, the thermal stability was affected by both the deposition temperatures of the channel and GI layers. An increase in the GI deposition temperature from 200 to 300 °C resulted in an improvement in the IGZO channel quality, accompanied by a reduction in the hydrogen concentration of the GI. These results indicated that the device, wherein GI was prepared at 300 °C, was appropriate from both perspectives of performance and subsequent postannealing. Nevertheless, only Dev-HD, in which the channel and GI layers were prepared at 270 and 300 °C, respectively, demonstrated favorable thermal stability after a postannealing at 300 °C. Two potential effects may be the formation of a complete network and the content of Ga, which contribute to stable bonding in IGZO channel. It can thus be concluded that the IGZO network structure and cationic composition can be adjusted to control the defect states in the channel, leading to an enhancement in both the device performance and thermal stability of the TG IGZO TFTs.