High-Performance Schottky-Barrier IGZO Thin-Film Transistors Based on Ohmic/Schottky Hybrid Contacts

IF 2.9 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Electron Devices Pub Date : 2024-10-08 DOI:10.1109/TED.2024.3469165
Yuzhi Li;Guangshuo Cai;Biao Tang;Shenghan Zou;Linfeng Lan;Zheng Gong
{"title":"High-Performance Schottky-Barrier IGZO Thin-Film Transistors Based on Ohmic/Schottky Hybrid Contacts","authors":"Yuzhi Li;Guangshuo Cai;Biao Tang;Shenghan Zou;Linfeng Lan;Zheng Gong","doi":"10.1109/TED.2024.3469165","DOIUrl":null,"url":null,"abstract":"In this work, we proposed and demonstrated etch-stopper-layer (ESL) structured indium-gallium-zinc oxide (IGZO) Schottky-barrier thin-film transistors (SBTFTs) with hybrid Ohmic/Schottky contacts utilizing single-layer Cu source/drain (S/D) electrodes. In this unique yet simple configuration, the AlOx layer deposited on the IGZO layer serves not only as a protection layer for the IGZO channel during S/D electrode etching but also as an interfacial layer for modulating the Schottky barrier of the Cu/IGZO contact. This, combined with quasi-Ohmic contact of Cu/IGZO, enables the formation of hybrid contacts based on a single-layer Cu electrode. The ESL-structured SBTFTs with hybrid contacts show a two-order magnitude increase in saturation current (\n<inline-formula> <tex-math>${I}_{\\text {dsat}}$ </tex-math></inline-formula>\n) compared to SBTFTs solely based on Schottky contacts, with high intrinsic gains exceeding 1500 at a gate voltage of 10 V, and good stability under gate bias and illumination stress. Utilizing technology computer-aided design (TCAD) simulation, the operation of ESL-structured IGZO SBTFTs was fully elucidated. Also, this study conducted a thorough investigation and analysis of the influence of source-drain gaps and Schottky contact lengths at the source on \n<inline-formula> <tex-math>${I}_{\\text {dsat}}$ </tex-math></inline-formula>\n and saturation voltage (\n<inline-formula> <tex-math>${V}_{\\text {dsat}}$ </tex-math></inline-formula>\n) for the devices. This work provides a promising route to fabricate low-cost metal oxide SBTFTs with significantly increased \n<inline-formula> <tex-math>${I}_{\\text {dsat}}$ </tex-math></inline-formula>\n.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":null,"pages":null},"PeriodicalIF":2.9000,"publicationDate":"2024-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electron Devices","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10709350/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

In this work, we proposed and demonstrated etch-stopper-layer (ESL) structured indium-gallium-zinc oxide (IGZO) Schottky-barrier thin-film transistors (SBTFTs) with hybrid Ohmic/Schottky contacts utilizing single-layer Cu source/drain (S/D) electrodes. In this unique yet simple configuration, the AlOx layer deposited on the IGZO layer serves not only as a protection layer for the IGZO channel during S/D electrode etching but also as an interfacial layer for modulating the Schottky barrier of the Cu/IGZO contact. This, combined with quasi-Ohmic contact of Cu/IGZO, enables the formation of hybrid contacts based on a single-layer Cu electrode. The ESL-structured SBTFTs with hybrid contacts show a two-order magnitude increase in saturation current ( ${I}_{\text {dsat}}$ ) compared to SBTFTs solely based on Schottky contacts, with high intrinsic gains exceeding 1500 at a gate voltage of 10 V, and good stability under gate bias and illumination stress. Utilizing technology computer-aided design (TCAD) simulation, the operation of ESL-structured IGZO SBTFTs was fully elucidated. Also, this study conducted a thorough investigation and analysis of the influence of source-drain gaps and Schottky contact lengths at the source on ${I}_{\text {dsat}}$ and saturation voltage ( ${V}_{\text {dsat}}$ ) for the devices. This work provides a promising route to fabricate low-cost metal oxide SBTFTs with significantly increased ${I}_{\text {dsat}}$ .
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
基于欧姆/肖特基混合触点的高性能肖特基势垒 IGZO 薄膜晶体管
在这项工作中,我们利用单层铜源/漏极(S/D)电极,提出并演示了具有欧姆/肖特基混合触点的蚀刻阻挡层(ESL)结构铟镓锌氧化物(IGZO)肖特基势垒薄膜晶体管(SBTFT)。在这种独特而简单的配置中,沉积在 IGZO 层上的氧化铝层不仅是 S/D 电极蚀刻过程中 IGZO 沟道的保护层,还是调节铜/IGZO 接触肖特基势垒的界面层。这与铜/IGZO 的准欧姆接触相结合,使得基于单层铜电极的混合接触得以形成。与仅基于肖特基触点的 SBTFT 相比,具有混合触点的 ESL 结构 SBTFT 的饱和电流(${I}_{text\{dsat}}$)增加了两个数量级,在 10 V 栅极电压下具有超过 1500 的高本征增益,并且在栅极偏压和光照应力下具有良好的稳定性。利用技术计算机辅助设计(TCAD)仿真,全面阐明了 ESL 结构 IGZO SBTFT 的工作原理。此外,这项研究还深入调查和分析了源漏间隙和源端的肖特基接触长度对器件的{I}_{text {dsat}}$ 和饱和电压({V}_{text {dsat}}$ )的影响。这项工作为制造低成本、{I}_{text {dsat}}$ 显著提高的金属氧化物 SBTFT 提供了一条很有前景的途径。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
IEEE Transactions on Electron Devices
IEEE Transactions on Electron Devices 工程技术-工程:电子与电气
CiteScore
5.80
自引率
16.10%
发文量
937
审稿时长
3.8 months
期刊介绍: IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.
期刊最新文献
Table of Contents Special Issue on Intelligent Sensor Systems for the IEEE Journal of Electron Devices Corrections to “Electron Emission Regimes of Planar Nano Vacuum Emitters” IEEE Open Access Publishing IEEE ELECTRON DEVICES SOCIETY
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1