{"title":"Sub-60 mV/Decade Dynamic Subthreshold Swing in Bulk Negative Capacitance Junctionless MOSFET","authors":"Ruma S. R.;Manish Gupta","doi":"10.1109/TED.2024.3462373","DOIUrl":null,"url":null,"abstract":"Through well-calibrated simulations, this work provides physical insights into the occurrence of dynamic sub-60 mV/decade switching in a negative capacitance (NC) junctionless (JL) transistor designed on a bulk substrate. Recognizing that the location of the conduction channel is a key factor governing the matching between ferroelectric and gate capacitances, we showcase the outperformance of bulk NCJL transistors compared to NCJL devices designed on a silicon-on-insulator (SOI) substrate. Results highlight that NCJL transistors designed with relatively higher bulk doping can achieve better dynamic \n<inline-formula> <tex-math>${S}_{\\text {swing}}$ </tex-math></inline-formula>\n along with a higheron-to-off current ratio. We also investigate the short-channel performance comparison of bulk and SOI NCJL transistors. The results demonstrate the superiority of bulk NCJL transistors due to the enhanced NC effect resulting from the better ferroelectric and gate capacitances matching. The work provides a new viewpoint for designing of NCJL transistor on bulk substrate to facilitate steep \n<inline-formula> <tex-math>${S}_{\\text {swing}}$ </tex-math></inline-formula>\n at scaled gate lengths.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"71 11","pages":"7156-7161"},"PeriodicalIF":2.9000,"publicationDate":"2024-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electron Devices","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10702354/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Through well-calibrated simulations, this work provides physical insights into the occurrence of dynamic sub-60 mV/decade switching in a negative capacitance (NC) junctionless (JL) transistor designed on a bulk substrate. Recognizing that the location of the conduction channel is a key factor governing the matching between ferroelectric and gate capacitances, we showcase the outperformance of bulk NCJL transistors compared to NCJL devices designed on a silicon-on-insulator (SOI) substrate. Results highlight that NCJL transistors designed with relatively higher bulk doping can achieve better dynamic
${S}_{\text {swing}}$
along with a higheron-to-off current ratio. We also investigate the short-channel performance comparison of bulk and SOI NCJL transistors. The results demonstrate the superiority of bulk NCJL transistors due to the enhanced NC effect resulting from the better ferroelectric and gate capacitances matching. The work provides a new viewpoint for designing of NCJL transistor on bulk substrate to facilitate steep
${S}_{\text {swing}}$
at scaled gate lengths.
期刊介绍:
IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.