Enhancing SRAM-Based PUF Reliability Through Machine Learning-Aided Calibration Techniques

IF 2.7 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Pub Date : 2024-11-06 DOI:10.1109/TCAD.2024.3449570
Kuheli Pratihar;Soumi Chatterjee;Rajat Subhra Chakraborty;Debdeep Mukhopadhyay
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Abstract

Static random access memory (SRAM)-based physically unclonable functions (PUFs) utilize unpredictable start-up values (SUVs) for key generation, making them widely adopted in cryptographic systems. This unpredictability in SUVs is accompanied by device noise that escalates with process-voltage–temperature (PVT) variations, resulting in significant deviations from the golden response collected at ambient conditions, thereby increasing the bit-error-rate (BER) of the PUF responses. To reduce this high- $(\geq 15\%)$ BER, either an involved error correcting code (ECC) circuitry with significant overhead is required, or more helper information needs to be generated at varying operating conditions, resulting in increased information leakage. We address this issue by proposing the first reported application of machine learning to recalibrate the responses by predicting the golden responses of the SRAM-based PUF (SRAM-PUF) at different operating conditions with high accuracy. Our recalibration technique is based on a novel collective decision that involves observing the neighborhood cells of the SRAM-PUF, as opposed to the traditional single-cell approach. By leveraging a memory map exhibiting a high correlation in ambient reliability amongst neighboring cells, we indirectly use the physical co-location of SRAM cells to assist neighborhood error prediction. It leads to efficient post-processing for SRAM-PUFs by using helper data generated at ambient conditions only while employing a fixed ECC designed for the same. Subsequently, to justify our claims and validate the efficacy of our proposed methodology, we demonstrate extensive experimentation results over multiple SRAM-PUF instances implemented on the Arduino UNO (an 8-bit microcontroller unit) and its scaled-up version, the Arduino Zero (a 32-bit microcontroller unit) boards, by varying supply voltages from 3.8 to 6.2 V and 7 to 12 V, respectively, and temperature from −25° to 70° C in both cases. Our observations show a vast drop in BER from 17.02% to $\approx 1\%$ . Although worst-case conditions with both voltage and temperature variations at play resulted in a BER of 20%, using our proposed approach reduces it to $\approx 1{\text {-}} 2\%$ , in turn demonstrating the high efficacy of our scheme.
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通过机器学习辅助校准技术提高基于 SRAM 的 PUF 可靠性
基于静态随机存取存储器(SRAM)的物理不可克隆函数(PUF)利用不可预测的启动值(SUV)生成密钥,因此在加密系统中被广泛采用。SUV的这种不可预测性伴随着设备噪声,这种噪声会随着工艺电压温度(PVT)的变化而增加,导致与在环境条件下收集到的黄金响应出现显著偏差,从而增加了PUF响应的误码率(BER)。要降低这种高误码率,要么需要使用开销巨大的纠错码(ECC)电路,要么需要在不同工作条件下生成更多辅助信息,从而导致信息泄漏增加。为了解决这个问题,我们首次报道了机器学习的应用,通过预测基于 SRAM 的 PUF(SRAM-PUF)在不同工作条件下的黄金响应,高精度地重新校准响应。与传统的单细胞方法不同,我们的重新校准技术基于一种新颖的集体决策,该决策涉及观察 SRAM-PUF 的邻近单元。通过利用相邻单元之间环境可靠性高度相关的存储器地图,我们间接利用 SRAM 单元的物理共定位来协助邻区误差预测。通过使用仅在环境条件下生成的辅助数据,同时采用为此设计的固定 ECC,它可为 SRAM-PUF 实现高效的后处理。随后,为了证明我们的主张并验证我们提出的方法的有效性,我们在 Arduino UNO(8 位微控制器单元)及其放大版 Arduino Zero(32 位微控制器单元)电路板上实施的多个 SRAM-PUF 实例上展示了广泛的实验结果,在两种情况下,电源电压分别从 3.8 V 到 6.2 V,7 V 到 12 V,温度从 -25°C 到 70°C。我们的观察结果表明,误码率从 17.02% 大幅下降到 1% 左右。虽然在电压和温度变化的最坏情况下,误码率为 20%,但使用我们提出的方法后,误码率降低到了大约 1%。2%$ ,这反过来又证明了我们方案的高效性。
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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Table of Contents IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems publication information IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems society information 2024 Index IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Vol. 43 Table of Contents
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