High-Performance Remote Data Persisting for Key-Value Stores via Persistent Memory Region

IF 2.7 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Pub Date : 2024-11-06 DOI:10.1109/TCAD.2024.3442992
Yongping Luo;Peiquan Jin;Xiaoliang Wang;Zhaole Chu;Kuankuan Guo;Jinhui Guo
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Abstract

Key-value stores (KVStores), such as LevelDB and Redis, have been widely used in real-world production environments. To guarantee data durability and availability, traditional KVStores suffer from high write latency, mainly caused by the long network and data-persisting time. To solve this problem, this article presents a novel data-persisting path for KVStores, allowing remote clients to persist data to the KVStore server with $\mu s$ -level latency. The novelty of this study is threefold. First, we propose PMRDirect, which utilizes a persistent memory region (PMR) in the NVM express standard to construct a direct data-persisting path from the RDMA networking card (NIC) to the PMR region inside an SSD. Second, to showcase PMRDirect in KVStores, we developed a new accessing stack called PMRAccess, enabling remote clients to access existing KVStores and providing durability for each write request. Specifically, we present a low-latency RDMA-based messaging mode and a chunk-based PMR management in PMRAccess to reduce write latency and improve system throughput. Finally, we conducted extensive experiments to evaluate the performance of our proposals. We first compared PMRDirect with a few remote data-persisting paths to show its effectiveness. Then, we evaluated PMRAccess upon two KVStores, including LibCuckoo (an in-memory KVStore) and LevelDB (an in-storage KVStore). The results showed that PMRAccess outperformed the SSD-based accessing stack by up to $6.1\times $ in write throughput and $36\times $ in write tail latency, and it achieved $1.7\times $ higher write throughput and $0.59\times $ lower write tail latency over the PMEM-based accessing stack. Further, we conducted a system-to-system comparison between the PMRAccess-integrated LibCuckoo and Redis, and the results showed our proposal achieved up to $13\times $ higher throughputs and $40\times $ lower write latency than Redis.
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通过持久内存区域实现键值存储的高性能远程数据持久化
LevelDB 和 Redis 等键值存储(KVStores)已在实际生产环境中得到广泛应用。为了保证数据的持久性和可用性,传统的 KVStores 存在写延迟过高的问题,这主要是由较长的网络和数据驻留时间造成的。为了解决这个问题,本文提出了一种新型的 KVStores 数据持久化路径,允许远程客户端以 $\mu s$ 级别的延迟将数据持久化到 KVStore 服务器。这项研究的新颖性体现在三个方面。首先,我们提出了 PMRDirect,它利用 NVM express 标准中的持久内存区域(PMR)来构建从 RDMA 网卡(NIC)到固态硬盘内 PMR 区域的直接数据持久化路径。其次,为了在 KVStores 中展示 PMRDirect,我们开发了一种名为 PMRAccess 的新访问堆栈,使远程客户端能够访问现有的 KVStores,并为每个写入请求提供持久性。具体来说,我们在 PMRAccess 中提出了一种基于 RDMA 的低延迟消息传递模式和基于分块的 PMR 管理,以减少写入延迟并提高系统吞吐量。最后,我们进行了大量实验来评估我们建议的性能。我们首先将 PMRDirect 与一些远程数据存在路径进行了比较,以显示其有效性。然后,我们在两个 KVStores(包括 LibCuckoo(内存 KVStore)和 LevelDB(存储 KVStore))上评估了 PMRAccess。结果显示,PMRAccess在写吞吐量和写尾延迟方面分别比基于固态盘的访问堆栈高出6.1倍和36倍,比基于PMEM的访问堆栈高出1.7倍和0.59倍。此外,我们还在集成了PMRAccess的LibCuckoo和Redis之间进行了系统对系统的比较,结果表明我们的建议比Redis的吞吐量高13倍,写延迟低40倍。
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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Table of Contents IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems society information IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems publication information Table of Contents NOVELLA: Nonvolatile Last-Level Cache Bypass for Optimizing Off-Chip Memory Energy
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