Real-Time Digital Baseline Restoration for CCD Sensors With Implementation in FPGA

IF 4.3 2区综合性期刊 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Sensors Journal Pub Date : 2024-10-09 DOI:10.1109/JSEN.2024.3472891

Qi Feng;Hongfei Zhang;Cheng Chen;Hui Wang;Jian Wang

引用次数: 0

Abstract

Charge-coupled device (CCD) sensors are the primary imaging sensors in scientific astronomical cameras, known for their exceptional channel uniformity. However, the unavoidable baseline drift during alternating current (ac) coupling leads to inconsistencies among pixels in the row direction, especially during high-speed readouts. Standard corrections are insufficient, posing challenges to astronomical observations. The digital correlated double sampling (DCDS) technology enables digital signal processing (DSP) for CCD readout. A real-time digital baseline restoration method was developed and implemented in a field-programmable gate array (FPGA). This method overcomes traditional limitations and can eliminate baseline drift error effectively. Furthermore, the performance of this method in terms of readout noise, channel gain, and nonlinearity was tested, confirming its potential for compensating for baseline drift error in scientific applications.

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用 FPGA 实现 CCD 传感器的实时数字基线恢复

电荷耦合器件（CCD）传感器是科学天文照相机的主要成像传感器，以其出色的通道均匀性而著称。然而，交流电（AC）耦合过程中不可避免的基线漂移会导致行方向像素间的不一致性，尤其是在高速读取过程中。标准校正是不够的，这给天文观测带来了挑战。数字相关双采样（DCDS）技术实现了 CCD 读出的数字信号处理（DSP）。开发了一种实时数字基线恢复方法，并在现场可编程门阵列（FPGA）中实现。这种方法克服了传统方法的局限性，能有效消除基线漂移误差。此外，还测试了这种方法在读出噪声、通道增益和非线性方面的性能，证实了它在科学应用中补偿基线漂移误差的潜力。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Sensors Journal 工程技术-工程：电子与电气

CiteScore

7.70

自引率

14.00%

发文量

2058

审稿时长

5.2 months

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