Evaluation of hardware and software implementations for NIST finalist and fourth-round post-quantum cryptography KEMs

Abstract

Quantum computer attacks could easily jeopardize the total security of currently employed encryption systems. As a result, there is an ongoing collaborative effort to design post-quantum cryptography (PQC) algorithms, and to this end many works in the literature have been published. In this paper, five Key Encapsulation Mechanisms (KEM) for PQC that the National Institute of Standards and Technology (NIST) considered as one finalist and 4, fourth round KEMs are reviewed and compared, as well as their software and hardware implementations. Because of the high computational complexity of PQC algorithms, real-time implementation necessitates a large amount of hardware resources, particularly the number of multipliers. Also, traditional performance aspects of each algorithm that are implemented in hardware are compared, such as area, delay, and power, particularly, the memory requirements, resource usage, Lookup tables (LUTs), registers, Flip-flops, maximum operating frequency, number of cycles for encapsulation and decapsulation etc., to quantify and highlight the features of each algorithm. This survey discusses a variety of PQC algorithms that can be used to meet a variety of application needs, including accuracy, hardware resource usage, and throughput. It also informs researchers and engineers about the most recent advances in PQC research in order to identify research problems and improve designs for efficient PQC algorithms.