Why Contour Averaging Works for SEM Metrology: Analysis and Validation

IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Semiconductor Manufacturing Pub Date : 2024-10-01 DOI:10.1109/TSM.2024.3471635
Jingxian Wei;Chenyu Xu;Sihai Zhang
{"title":"Why Contour Averaging Works for SEM Metrology: Analysis and Validation","authors":"Jingxian Wei;Chenyu Xu;Sihai Zhang","doi":"10.1109/TSM.2024.3471635","DOIUrl":null,"url":null,"abstract":"As the technology node in semiconductor manufacturing continuously shrinks, the etch-induced etch bias introduced during the etching process cannot be ignored and necessitates correction. The prevailing approach to addressing this issue is model-based etch bias correction. This method involves simulating the etching process by training an etch model that predicts the bias between the After Development Inspection (ADI) contour and the After Etch Inspection (AEI) contour. However, the reliability of the etch data for model training is compromised due to pattern shrinkage during Scanning Electron Microscope (SEM) imaging, which impairs the model’s prediction accuracy. To mitigate these issues, the contour averaging method is frequently employed, although it lacks thorough theoretical explanation and experimental verification. In this study, we validate the effectiveness of contour averaging theoretically and empirically. A relationship is derived between the prediction error of the etch model and the number of averaged contours, showing that contour averaging minimizes measurement errors of etch data. We also demonstrate the improved prediction accuracy of etch model using contour averaging, with both real and generated etch data.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"37 4","pages":"535-541"},"PeriodicalIF":2.3000,"publicationDate":"2024-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Semiconductor Manufacturing","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10701041/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

As the technology node in semiconductor manufacturing continuously shrinks, the etch-induced etch bias introduced during the etching process cannot be ignored and necessitates correction. The prevailing approach to addressing this issue is model-based etch bias correction. This method involves simulating the etching process by training an etch model that predicts the bias between the After Development Inspection (ADI) contour and the After Etch Inspection (AEI) contour. However, the reliability of the etch data for model training is compromised due to pattern shrinkage during Scanning Electron Microscope (SEM) imaging, which impairs the model’s prediction accuracy. To mitigate these issues, the contour averaging method is frequently employed, although it lacks thorough theoretical explanation and experimental verification. In this study, we validate the effectiveness of contour averaging theoretically and empirically. A relationship is derived between the prediction error of the etch model and the number of averaged contours, showing that contour averaging minimizes measurement errors of etch data. We also demonstrate the improved prediction accuracy of etch model using contour averaging, with both real and generated etch data.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
为什么轮廓平均法适用于 SEM 计量?分析与验证
随着半导体制造技术节点的不断缩小,蚀刻过程中引入的蚀刻偏差不容忽视,必须进行校正。解决这一问题的主流方法是基于模型的蚀刻偏差校正。这种方法是通过训练蚀刻模型来模拟蚀刻过程,该模型可预测显影后检测 (ADI) 轮廓与蚀刻后检测 (AEI) 轮廓之间的偏差。然而,由于扫描电子显微镜 (SEM) 成像过程中的图案收缩会影响模型预测的准确性,因此用于模型训练的蚀刻数据的可靠性受到了影响。为了缓解这些问题,人们经常采用轮廓平均法,但这种方法缺乏全面的理论解释和实验验证。在本研究中,我们从理论和经验上验证了轮廓平均法的有效性。我们得出了蚀刻模型的预测误差与平均轮廓数量之间的关系,表明轮廓平均法可将蚀刻数据的测量误差降至最低。我们还利用实际蚀刻数据和生成的蚀刻数据证明,使用等值线平均法提高了蚀刻模型的预测精度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
IEEE Transactions on Semiconductor Manufacturing
IEEE Transactions on Semiconductor Manufacturing 工程技术-工程:电子与电气
CiteScore
5.20
自引率
11.10%
发文量
101
审稿时长
3.3 months
期刊介绍: The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components, especially very large scale integrated circuits (VLSI). Manufacturing these products requires precision micropatterning, precise control of materials properties, ultraclean work environments, and complex interactions of chemical, physical, electrical and mechanical processes.
期刊最新文献
2024 Index IEEE Transactions on Semiconductor Manufacturing Vol. 37 Front Cover Editorial Table of Contents IEEE Transactions on Semiconductor Manufacturing Publication Information
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1