{"title":"A 0.22 mm² 0.5~4 GHz Active Single-Sideband Time Modulator With a Single Digital-Sequence Control","authors":"Guoxiao Cheng;Tao Wang;Zhihao Li;Jin-Dong Zhang;Qiaoyu Chen;Wen Wu","doi":"10.1109/LMWT.2024.3471805","DOIUrl":null,"url":null,"abstract":"This letter proposes a novel single-sideband time modulator (STM) that uses a periodically controlled 4-bit active vector modulator with regularly controlled gate widths. Timing sequences for control bits are generated from a single digital sequence using a \n<inline-formula> <tex-math>$\\div 16$ </tex-math></inline-formula>\n frequency divider. By precisely delaying the single digital sequence, the proposed active STM achieves high-precision and frequency-independent phase-shifting performance while enhancing the sideband suppression ratio (SSR) without raising insertion loss. Fabricated in 0.13-\n<inline-formula> <tex-math>$\\mu $ </tex-math></inline-formula>\n m CMOS technology, it occupies a compact area of \n<inline-formula> <tex-math>$1.1\\times 0.2$ </tex-math></inline-formula>\n mm2. Measured results show an equivalent 10-bit phase resolution, root mean square (rms) phase error of 0.13°~0.36°, and rms gain error of 0.05~0.31 dB in a frequency range of 0.5~4.0 GHz. The measured SSR is less than −23.5 dBc, and the instantaneous bandwidth is expanded to \n<inline-formula> <tex-math>$16~f_{\\text {P}}$ </tex-math></inline-formula>\n.","PeriodicalId":73297,"journal":{"name":"IEEE microwave and wireless technology letters","volume":"34 12","pages":"1375-1378"},"PeriodicalIF":0.0000,"publicationDate":"2024-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE microwave and wireless technology letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10710153/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"0","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This letter proposes a novel single-sideband time modulator (STM) that uses a periodically controlled 4-bit active vector modulator with regularly controlled gate widths. Timing sequences for control bits are generated from a single digital sequence using a
$\div 16$
frequency divider. By precisely delaying the single digital sequence, the proposed active STM achieves high-precision and frequency-independent phase-shifting performance while enhancing the sideband suppression ratio (SSR) without raising insertion loss. Fabricated in 0.13-
$\mu $
m CMOS technology, it occupies a compact area of
$1.1\times 0.2$
mm2. Measured results show an equivalent 10-bit phase resolution, root mean square (rms) phase error of 0.13°~0.36°, and rms gain error of 0.05~0.31 dB in a frequency range of 0.5~4.0 GHz. The measured SSR is less than −23.5 dBc, and the instantaneous bandwidth is expanded to
$16~f_{\text {P}}$
.