A Normalizing Flow Based Validity-Preserving Inverse-Design Model for Nanoscale MOSFETs

Abstract

A two-stage inverse model for the design of gate-all-around nanowire metal oxide semiconductor field effect transistors (MOSFETs) is proposed in this article. The proposed model first validates the selection of output characteristics using a normalizing flow based generative model, and then predicts the device parameters corresponding to the valid output characteristics using a cascade of inverse and forward artificial neural networks (ANNs). This accurately captures any out-of-distribution datapoint in the output characteristics distribution and computes the device parameters through the inverse ANN, avoiding any conflicts created by non-unique mappings. The two-stage model instantly predicts possible device designs for a target output characteristic set without going for multiple iterations to arrive at a device-design, highlighting the accuracy and robustness of the model.