Reconfiguring van der Waals Metal–Semiconductor Contacts via Selenium Intercalation/Deintercalation Post-Treatment

IF 16 1区 材料科学 Q1 CHEMISTRY, MULTIDISCIPLINARY ACS Nano Pub Date : 2024-12-21 DOI:10.1021/acsnano.4c15117
Gihyeon Kwon, Hyeon-Sik Kim, Kwangsik Jeong, Sewoong Oh, Dajung Kim, Woochan Koh, Hyunjun Park, Seongil Im, Mann-Ho Cho
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Abstract

To achieve the commercialization of two-dimensional (2D) semiconductors, the identification of an appropriate combination of 2D semiconductors and three-dimensional (3D) metals is crucial. Furthermore, understanding the van der Waals (vdW) interactions between these materials in thin-film semiconductor processes is essential. Optimizing these interactions requires precise control over the properties of the vdW interface through specific pre- or post-treatment methods. This study utilizes Se-environment annealing as a post-treatment technique, which allows for modification of the vdW gap distance and enhancement of the stability of the interfacial structure through the process of Se intercalation and deintercalation at the 2D–3D interface. The depth of Se intercalation and deintercalation is adjusted by varying the temperature and duration of the postannealing process in an Se environment. This precise control over the process enables the effective metallization of 2D semiconductors. The results indicate that expanding the vdW gap and stabilizing the interface structure through this post-treatment significantly improve the metal contact properties in devices such as field-effect transistors and photovoltaic Schottky diodes by minimizing metal-induced gap states, thus reducing Fermi level pinning. The application of Se intercalation and deintercalation techniques achieves an exceptionally low contact resistance of 773 Ω·μm between p-type WSe2 and Au. Additionally, the integration of doping-free WSe2 complementary metal-oxide-semiconductor (CMOS) circuits using Se-environment annealing and blocking layers is demonstrated, establishing a promising advancement in semiconductor technology.

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通过硒嵌入/脱嵌入后处理重新配置范德华金属-半导体触点
要实现二维(2D)半导体的商业化,确定二维半导体和三维(3D)金属的适当组合至关重要。此外,了解薄膜半导体工艺中这些材料之间的范德华(vdW)相互作用也至关重要。优化这些相互作用需要通过特定的前处理或后处理方法精确控制范德华界面的特性。本研究利用硒环境退火作为后处理技术,通过硒在 2D-3D 界面的插层和脱插层过程,改变 vdW 间隙距离并增强界面结构的稳定性。通过改变 Se 环境中退火后过程的温度和持续时间,可以调节 Se 的插层和脱层深度。对这一过程的精确控制实现了二维半导体的有效金属化。研究结果表明,通过这种后处理方法扩大 vdW 间隙并稳定界面结构,可以最大限度地减少金属诱导的间隙态,从而降低费米级钉销,从而显著改善场效应晶体管和光伏肖特基二极管等器件的金属接触特性。硒插层和脱插层技术的应用实现了 p 型 WSe2 与金之间 773 Ω-μm 的超低接触电阻。此外,利用硒环境退火和阻挡层还展示了无掺杂 WSe2 互补金属氧化物半导体(CMOS)电路的集成,为半导体技术的发展带来了希望。
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来源期刊
ACS Nano
ACS Nano 工程技术-材料科学:综合
CiteScore
26.00
自引率
4.10%
发文量
1627
审稿时长
1.7 months
期刊介绍: ACS Nano, published monthly, serves as an international forum for comprehensive articles on nanoscience and nanotechnology research at the intersections of chemistry, biology, materials science, physics, and engineering. The journal fosters communication among scientists in these communities, facilitating collaboration, new research opportunities, and advancements through discoveries. ACS Nano covers synthesis, assembly, characterization, theory, and simulation of nanostructures, nanobiotechnology, nanofabrication, methods and tools for nanoscience and nanotechnology, and self- and directed-assembly. Alongside original research articles, it offers thorough reviews, perspectives on cutting-edge research, and discussions envisioning the future of nanoscience and nanotechnology.
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