{"title":"A SiC Trench Schottky Diode With Accelerated Hole Extraction and Recombination Structure for Enhancing Single-Event Burnout Tolerance","authors":"Rui Yang;Xiaochuan Deng;Haibo Wu;Xu Li;Xuan Li;Song Bai;Yi Wen;Bo Zhang","doi":"10.1109/TDMR.2024.3468468","DOIUrl":null,"url":null,"abstract":"A SiC trench junction barrier Schottky diode with multiple P-shield layers and an embedded N+ region (MPNT-JBS) is proposed and investigated for enhancing single-event burnout (SEB) tolerance. The Schottky contact at the sidewall of the trench and the embedded N+ region in MPNT-JBS accelerate the extraction and recombination of holes. The mitigated accumulation of holes contributes to the reduction of the strong electric field near the metal/SiC interface, thus favoring a decrease in the high temperature. Under 50% of the rated voltage (\n<inline-formula> <tex-math>$V_{\\mathrm { Cathode}}{=}600$ </tex-math></inline-formula>\n V), the maximum temperature near the metal/SiC interface in MPNT-JBS decreases by 78% and 71% compared to SiC JBS diode with multilayer N-buffer (MB-JBS), corresponding to the instances when heavy ions with a linear energy transfer (LET) value of 0.53 pC/\n<inline-formula> <tex-math>$\\mu $ </tex-math></inline-formula>\n m strike the middle of the Schottky contact and the P+ region, respectively. In addition, the multilayer P-shield of MPNT-JBS suppresses the peak temperature near the PN junction by enlarging the energy dissipation area and lowering the transient heat power near the PN junction. Compared to MB-JBS, the maximum temperature near the PN junction in MPNT-JBS decreases from 1890 K to 1454 K when heavy ions strike the middle of the P+ region (\n<inline-formula> <tex-math>$V_{\\mathrm { Cathode}}{=}600$ </tex-math></inline-formula>\n V). These results indicate that MPNT-JBS provides potential for enhancing SEB tolerance.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"24 4","pages":"549-555"},"PeriodicalIF":2.5000,"publicationDate":"2024-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Device and Materials Reliability","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10695738/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
A SiC trench junction barrier Schottky diode with multiple P-shield layers and an embedded N+ region (MPNT-JBS) is proposed and investigated for enhancing single-event burnout (SEB) tolerance. The Schottky contact at the sidewall of the trench and the embedded N+ region in MPNT-JBS accelerate the extraction and recombination of holes. The mitigated accumulation of holes contributes to the reduction of the strong electric field near the metal/SiC interface, thus favoring a decrease in the high temperature. Under 50% of the rated voltage (
$V_{\mathrm { Cathode}}{=}600$
V), the maximum temperature near the metal/SiC interface in MPNT-JBS decreases by 78% and 71% compared to SiC JBS diode with multilayer N-buffer (MB-JBS), corresponding to the instances when heavy ions with a linear energy transfer (LET) value of 0.53 pC/
$\mu $
m strike the middle of the Schottky contact and the P+ region, respectively. In addition, the multilayer P-shield of MPNT-JBS suppresses the peak temperature near the PN junction by enlarging the energy dissipation area and lowering the transient heat power near the PN junction. Compared to MB-JBS, the maximum temperature near the PN junction in MPNT-JBS decreases from 1890 K to 1454 K when heavy ions strike the middle of the P+ region (
$V_{\mathrm { Cathode}}{=}600$
V). These results indicate that MPNT-JBS provides potential for enhancing SEB tolerance.
期刊介绍：
The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.
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