A 0.4-V 500-kHz FLL With Reused TDA-Based Calibration and OTA-Accelerated Technique in 65-nm CMOS for Sleep Timer

Abstract

In compact and cost-constrained IoT low-power applications, the ultra-low-voltage (ULV) on-chip frequency-locked loop (FLL) offers a potential alternative to crystal oscillators while providing high energy efficiency. Compared to open-loop oscillators, the proposed FLL reuses the time-domain amplifier (TDA) as a temperature sensor, allowing the sleep timer to be calibrated with the use of a look-up table (LUT) to further enhance temperature accuracy. A redesigned OTA-accelerated second-order loop filter (LF) addresses the issue of excessive locking time in such low-frequency FLLs. Fabricated in 65-nm CMOS process, the prototype integrated circuit (IC) achieves a temperature coefficient (TC) of 41.7 ppm/°C with calibration based on an LUT and consumes 66.8 nW at 0.4-V supply while producing a 500-kHz frequency.