Variable frequency buck-boost converter for high efficiency voltage stacked systems

IF 1.2 4区 工程技术 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE Analog Integrated Circuits and Signal Processing Pub Date : 2024-12-30 DOI:10.1007/s10470-024-02297-6
Nurzhan Zhuldassov, Kan Xu, Eby G. Friedman
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Abstract

The rise of mobile technologies and cloud computing has increased the importance of efficient energy consumption. Due to parallelism, high voltage conversion ratios, and large supply currents, power losses are rapidly increasing. This issue can be managed by on-package voltage stacking, where the current is recycled between multiple cores. Current mismatch between serially connected cores however produces a noise voltage between the cores. Differential power processing (DPP) converters are a potential solution to this issue. In the current work, a power efficient, load-to-load synchronous buck converter operating within a voltage stacked system is examined. The buck converter is evaluated under very high current demand, where the core currents in a voltage stacked system reach a tenfold difference. A compact model to characterize the voltage drop in serially stacked systems is also described. Furthermore, a circuit topology to increase the power efficiency of this converter is proposed. By using an interleaved system with different active phases, the inductance in the converter can be changed, which produces variable frequency operation, resulting in increased power efficiency due to lower switching losses. The power efficiency of the converter is increased by up to 8% as compared to constant frequency operation, achieving a range between 89% to 99%.

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用于高效电压堆叠系统的变频降压-升压变换器
移动技术和云计算的兴起增加了高效能源消耗的重要性。由于并联、高电压转换比和大电源电流,功率损耗正在迅速增加。这个问题可以通过封装电压叠加来解决,其中电流在多个内核之间循环。然而,在串行连接的核心之间的电流不匹配会在核心之间产生噪声电压。差分功率处理(DPP)转换器是解决这一问题的一个潜在方案。在当前的工作中,研究了在电压堆叠系统中工作的功率高效,负载对负载同步降压变换器。降压变换器在非常高的电流需求下进行评估,其中电压堆叠系统中的核心电流达到十倍的差值。还描述了一个紧凑的模型来表征串联堆叠系统中的电压降。此外,还提出了一种电路拓扑结构,以提高该变换器的功率效率。通过使用具有不同有源相的交错系统,可以改变变换器中的电感,从而产生变频工作,从而由于降低开关损耗而提高功率效率。与恒频操作相比,转换器的功率效率提高了8%,达到89%至99%的范围。
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来源期刊
Analog Integrated Circuits and Signal Processing
Analog Integrated Circuits and Signal Processing 工程技术-工程:电子与电气
CiteScore
0.30
自引率
7.10%
发文量
141
审稿时长
7.3 months
期刊介绍: Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today. A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.
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