Novel Modulation Strategy to Achieve Neutral-point Voltage Balance, Common-mode Voltage, and Switching Loss Reduction for Neutral-point Clamped Three-level Inverters
{"title":"Novel Modulation Strategy to Achieve Neutral-point Voltage Balance, Common-mode Voltage, and Switching Loss Reduction for Neutral-point Clamped Three-level Inverters","authors":"Donghan Liu;Jinping Wang;Shengyu Liu;Weidong Jiang","doi":"10.23919/CJEE.2024.000080","DOIUrl":null,"url":null,"abstract":"Carrier-based pulse width modulation (CBPWM) and virtual space vector pulse width modulation (VSVPWM) are briefly reviewed for neutral-point-clamped three-level inverters (NPC TLI). A new modulation strategy referred to as N3S_CBPWM is then proposed to simultaneously consider multiple goals, such as the-neutral-point voltage (NPV) balance, switching loss, and common-mode voltage (CMV) reduction. For N3S_CBPWM in each switching cycle, the three-phase switching actions are zero, one, and two. In addition, the constraint conditions of the modulation waves are provided based on the reduction of the CMV. Subsequently, N3S_CBPWM, CBPWM, and VSVPWM are compared in terms of the NPV balance capability, switching loss, and CMV reduction. Finally, the feasibility and superiority of the proposed N3S_CBPWM are verified experimentally.","PeriodicalId":36428,"journal":{"name":"Chinese Journal of Electrical Engineering","volume":"10 4","pages":"106-118"},"PeriodicalIF":0.0000,"publicationDate":"2024-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10596097","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Chinese Journal of Electrical Engineering","FirstCategoryId":"1087","ListUrlMain":"https://ieeexplore.ieee.org/document/10596097/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"Engineering","Score":null,"Total":0}
引用次数: 0
Abstract
Carrier-based pulse width modulation (CBPWM) and virtual space vector pulse width modulation (VSVPWM) are briefly reviewed for neutral-point-clamped three-level inverters (NPC TLI). A new modulation strategy referred to as N3S_CBPWM is then proposed to simultaneously consider multiple goals, such as the-neutral-point voltage (NPV) balance, switching loss, and common-mode voltage (CMV) reduction. For N3S_CBPWM in each switching cycle, the three-phase switching actions are zero, one, and two. In addition, the constraint conditions of the modulation waves are provided based on the reduction of the CMV. Subsequently, N3S_CBPWM, CBPWM, and VSVPWM are compared in terms of the NPV balance capability, switching loss, and CMV reduction. Finally, the feasibility and superiority of the proposed N3S_CBPWM are verified experimentally.