A Novel Approach to Integrating Thermal Performance and Total Ionizing Dose Hardening in Void-Embedded Silicon-on-Insulator MOSFET

Abstract

The excellent tolerance against total ionizing dose (TID) effect and high compatibility with conventional technology nodes has been demonstrated in our previous work with void-embedded-silicon-on-insulator (VESOI) device. However, the presence of embedded void structures within the VESOI devices also introduces additional thermal performance challenges. To address this issue while maintaining the exceptional TID tolerance, we conducted a comprehensive study on the role played by embedded void in blocking both thermal conduction and radiation induced leakage path. Through both pulse I–V tests and systematic simulations, we have revealed the close relationship between the heat sinking capability of VESOI devices and the embedded voids with different structures and dimensions. By applying a nanoscale-embedded chamber extending into the middle channel of VESOI MOSFET, the increase of temperature in the channel is suppressed to a rather low level of 0.3 K. Furthermore, the nano void chamber is also found effective in cutting off radiation-induced leakage paths lying near the bottom channel, resulting in a reduction of the leakage current to $10^{-{11}}~\mu $ A/ $\mu $ m. This study paves the way for developing more robust and efficient devices based on VESOI technology that can maintain better thermal performance along with TID robustness.