Evaluation of a Plasmon-Based Optical Integrated Circuit for Error-Tolerant Streaming Applications

IF 2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2024-12-04 DOI:10.1109/JXCDC.2024.3510684
Samantha Lubaba Noor;Xuan Wu;Dennis Lin;Pol van Dorpe;Francky Catthoor;Patrick Reynaert;Azad Naeemi
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Abstract

In this work, we have designed and modeled an integrated plasmonic computing module, which operates at 200 GHz clock frequency for high-end streaming algorithm applications. Our work includes designing the individual optical components (modulator, logic gate, and photodetector) and high-speed electronic driver circuits and integrating the components considering their interactions. We have also holistically evaluated the system-level performance of the computing module, taking into account various factors such as power consumption, operational speed, physical footprint, and average temperature. Through rigorous numerical analyses, we have found that with the existing technology and available materials, the plasmonic computing module can best achieve a bit-error-ratio (BER) of $10^{-1}$ . The performance can be improved by using a high electrooptic coefficient material in the phase shifter and increasing the driver circuit’s swing to greater than 1 V.
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基于等离子体的容错流应用光学集成电路的评价
在这项工作中,我们设计并建模了一个集成的等离子体计算模块,该模块工作在200 GHz时钟频率下,用于高端流算法应用。我们的工作包括设计单个光学元件(调制器,逻辑门和光电探测器)和高速电子驱动电路,并考虑到它们的相互作用集成组件。我们还全面评估了计算模块的系统级性能,考虑了各种因素,如功耗、运行速度、物理占用空间和平均温度。通过严格的数值分析,我们发现在现有的技术和可用的材料下,等离子体计算模块可以达到10^{-1}$的最佳误码率(BER)。通过在移相器中使用高电光系数的材料,并将驱动电路的摆幅增加到大于1v,可以提高移相器的性能。
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来源期刊
CiteScore
5.00
自引率
4.20%
发文量
11
审稿时长
13 weeks
期刊最新文献
2024 Index IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Vol. 10 Front Cover Table of Contents INFORMATION FOR AUTHORS IEEE Journal on Exploratory Solid-State Computational Devices and Circuits publication information
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