VSAGE: An End-to-End Automated VCO-Based ΔΣ ADC Generator

IF 2.8 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2024-12-04 DOI:10.1109/TVLSI.2024.3507567

Ken Li;Tian Xie;Tzu-Han Wang;Shaolan Li

引用次数: 0

Abstract

This article presents VSAGE, an agile end-to-end automated voltage-controlled oscillator (VCO)-based

$\Delta \Sigma $

analog-to-digital converter (ADC) generator. It exploits time-domain architectures and design mindset, so that the design flow is highly oriented around digital standard cells in contrast to the transistor-level-focused approach in conventional analog design. Through this, it speeds up and simplifies both the synthesis phase and layout phase. Combined with an efficient knowledge-machine learning (ML)-guided synthesis flow, it can translate input specifications to a full system layout with reliable performance within minutes. This work also features a compact oscillator and system modeling method that facilitates light-resource accurate computation and network training. The generator is verified with 12 design cases in 65-nm and 28-nm processes, proving its capability of generating competitive design with good process portability.

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VSAGE：端到端自动化基于vco的ΔΣ ADC生成器

本文介绍了VSAGE，一种灵活的端到端自动压控振荡器（VCO） $\Delta \Sigma $模数转换器（ADC）发生器。它利用时域架构和设计思维，因此设计流程高度围绕数字标准单元，而不是传统模拟设计中以晶体管级为中心的方法。通过这一点，加快和简化了合成阶段和布局阶段。结合高效的知识机器学习（ML）指导合成流程，它可以在几分钟内将输入规格转换为具有可靠性能的完整系统布局。这项工作还具有紧凑的振荡器和系统建模方法，便于光源精确计算和网络训练。通过65纳米和28纳米工艺的12个设计案例验证了该生成器，证明其具有良好的工艺可移植性，能够生成具有竞争力的设计。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.

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