An RISC-V PPA-Fusion Cooperative Optimization Framework Based on Hybrid Strategies

IF 2.8 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2024-11-25 DOI:10.1109/TVLSI.2024.3496858
Tianning Gao;Yifan Wang;Ming Zhu;Xiulong Wu;Dian Zhou;Zhaori Bi
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Abstract

The optimization of RISC-V designs, encompassing both microarchitecture and CAD tool parameters, is a great challenge due to an extensive and high-dimensional search space. Conventional optimization methods, such as case-specific approaches and black-box optimization approaches, often fall short of addressing the diverse and complex nature of RISC-V designs. To achieve optimal results across various RISC-V designs, we propose the cooperative optimization framework (COF) that integrates multiple black-box optimizers, each specializing in different optimization problems. The COF introduces the landscape knowledge exchange mechanism (LKEM) to direct the optimizers to share their knowledge of the optimization problem. Moreover, the COF employs the dynamic computational resource allocation (DCRA) strategies to dynamically allocate computational resources to the optimizers. The DCRA strategies are guided by the optimizer efficiency evaluation (OEE) mechanism and a time series forecasting (TSF) model. The OEE provides real-time performance evaluations. The TSF model forecasts the optimization progress made by the optimizers, given the allocated computational resources. In our experiments, the COF reduced the cycle per instruction (CPI) of the Berkeley out-of-order machine (BOOM) by 15.36% and the power of Rocket-Chip by 12.84% without constraint violation compared to the respective initial designs.
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基于混合策略的RISC-V PPA-Fusion协同优化框架
RISC-V设计的优化,包括微架构和CAD工具参数,是一个巨大的挑战,由于广泛和高维的搜索空间。传统的优化方法,如具体案例方法和黑盒优化方法,往往无法解决RISC-V设计的多样性和复杂性。为了在各种RISC-V设计中获得最佳结果,我们提出了协作优化框架(COF),该框架集成了多个黑盒优化器,每个黑盒优化器专门用于不同的优化问题。COF引入景观知识交换机制(LKEM),引导优化者分享他们对优化问题的知识。此外,COF采用动态计算资源分配(DCRA)策略将计算资源动态分配给优化器。DCRA策略由优化器效率评价(OEE)机制和时间序列预测(TSF)模型指导。OEE提供实时性能评估。在给定分配的计算资源情况下,TSF模型预测优化器的优化进度。在实验中,与初始设计相比,COF在不违反约束的情况下将Berkeley乱序机(BOOM)的每指令周期(CPI)降低了15.36%,将Rocket-Chip的功率降低了12.84%。
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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