Recovery Analysis of Sequentially Irradiated and NBT-Stressed VDMOS Transistors.

Abstract

This study investigates the effects of negative bias temperature (NBT) stress and irradiation on the threshold voltage (V_T) of p-channel VDMOS transistors, focusing on degradation, recovery after each type of stress, and operational behavior under varying conditions. Shifts in V_T (ΔV_T) were analyzed under different stress orders, showing distinct influence mechanisms, including defects creation and their removal and electrochemical reactions. Recovery data after each type of stress indicated ongoing electrochemical processes, influencing subsequent stress responses. Although the ΔV_T is not particularly pronounced during the recovery after irradiation, changes in subthreshold characteristics indicate the changes in defect densities that affect the behavior of the components during further application. Additionally, the findings show that the ΔV_T during the NBT stress after irradiation (up to certain doses and conditions) remains relatively stable, but this is the result of a balance of competing mechanisms. A subthreshold characteristic analysis provided a further insight into the degradation dynamics. A particular attention was paid to analyzing ΔV_T with a focus on predicting the lifetime. In practical applications, especially under pulsed operation, prior stresses altered the device's thermal and electrical performance. It was shown that self-heating effects were more pronounced in pre-stressed components, increasing the power dissipation and thermal instability. These insights additionally highlight the importance of understanding stress-induced degradation and recovery mechanisms for optimizing VDMOS transistor reliability in advanced electronic systems.