Demonstration of a Ternary Inverter Based on the Novel TDDFET With Dual-Doped Source and Asymmetric Gates

IF 2.1 4区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Nanotechnology Pub Date : 2024-11-25 DOI:10.1109/TNANO.2024.3505985
Bin Lu;Hua Qiang;Xiaotao Liu;Dawei Wang;Yan Cui;Zhu Li;Jiale Sun;Hongliang Lu
{"title":"Demonstration of a Ternary Inverter Based on the Novel TDDFET With Dual-Doped Source and Asymmetric Gates","authors":"Bin Lu;Hua Qiang;Xiaotao Liu;Dawei Wang;Yan Cui;Zhu Li;Jiale Sun;Hongliang Lu","doi":"10.1109/TNANO.2024.3505985","DOIUrl":null,"url":null,"abstract":"In this paper, a novel tunneling-drift-diffusion field-effect transistor (TDDFET) is introduced with dual-doped source and asymmetric gates. In the TDDFET, the current is conducted by two mechanisms, namely the band-to-band tunneling and drift-diffusion, making the device can present an additional state between the on and off states, and very suitable for the ternary logic design. Additionally, a standard ternary inverter (STI) is also implemented based on the TDDFET and studied in detail by the aid of TCAD simulation. It turns out that the supply voltage V<sub>DD</sub> shows significant influence on the ternary inverter and the optimized value is about 3V<sub>turn</sub>/2 in which V<sub>turn</sub> is the transition voltage on the transfer curve. The influence of key device parameters are also studied in detail. Compared with other ternary inverters, our designed ternary inverter requiring no any immature material, passive device and multi-valued power supply, is more friendly with the CMOS platform and can make the most of the advantages of the ternary logic.","PeriodicalId":449,"journal":{"name":"IEEE Transactions on Nanotechnology","volume":"24 ","pages":"59-66"},"PeriodicalIF":2.1000,"publicationDate":"2024-11-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Nanotechnology","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10767180/","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

In this paper, a novel tunneling-drift-diffusion field-effect transistor (TDDFET) is introduced with dual-doped source and asymmetric gates. In the TDDFET, the current is conducted by two mechanisms, namely the band-to-band tunneling and drift-diffusion, making the device can present an additional state between the on and off states, and very suitable for the ternary logic design. Additionally, a standard ternary inverter (STI) is also implemented based on the TDDFET and studied in detail by the aid of TCAD simulation. It turns out that the supply voltage VDD shows significant influence on the ternary inverter and the optimized value is about 3Vturn/2 in which Vturn is the transition voltage on the transfer curve. The influence of key device parameters are also studied in detail. Compared with other ternary inverters, our designed ternary inverter requiring no any immature material, passive device and multi-valued power supply, is more friendly with the CMOS platform and can make the most of the advantages of the ternary logic.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
求助全文
约1分钟内获得全文 去求助
来源期刊
IEEE Transactions on Nanotechnology
IEEE Transactions on Nanotechnology 工程技术-材料科学:综合
CiteScore
4.80
自引率
8.30%
发文量
74
审稿时长
8.3 months
期刊介绍: The IEEE Transactions on Nanotechnology is devoted to the publication of manuscripts of archival value in the general area of nanotechnology, which is rapidly emerging as one of the fastest growing and most promising new technological developments for the next generation and beyond.
期刊最新文献
2024 Index IEEE Transactions on Nanotechnology Vol. 23 On the Dependability of Bidirectional Encoder Representations from Transformers (BERT) to Soft Errors Implications of Dielectric Phases in Ferroelectric HfO$_{2}$ Films on the Performance of Negative Capacitance FETs Improvement of Surface Roughness in SiO2 Thin Films via Deuterium Annealing at 300 °C On the Importance of the Metal Catalyst Layer to the Performance of CNT-Based Supercapacitor Electrodes
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1