Hardware security against IP piracy using secure fingerprint encrypted fused amino-acid biometric with facial anthropometric signature

IF 1.9 4区 计算机科学 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE Microprocessors and Microsystems Pub Date : 2025-02-01 DOI:10.1016/j.micpro.2024.105131
Anirban Sengupta, Aditya Anshul, Ayush Kumar Singh
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Abstract

In the era of modern global design supply chain, the emergence of hardware threats is on the rise. Conventional hardware security techniques may fall short in terms of offering inferior tamper tolerance, unpersuasive digital ownership proof and weaker entropy, for sturdy intellectual property (IP) piracy detection and seamless IP ownership conflict resolution process. This paper presents a novel hardware security methodology based on IP seller's amino acid biometric and facial anthropometric features to generate an encrypted fused signature using multi-key driven non-invertible fingerprint, for providing sturdy detective countermeasure against IP piracy. The proposed approach exploits AES framework, where the generated key-translated fingerprint minutiae points of the IP seller is used as an encryption key. The proposed methodology is highly robust against hardware threats as it capable to generate large size covert security constraints for embedding, as digital evidence, in the IP design during high level synthesis (HLS). The results of the proposed approach on comparison with existing approaches, indicates enhanced tamper tolerance ability (against brute force attack) of upto 1.15E+77, lower probability of coincidence or false positive (against ghost signature search attack) of upto 6.72E-06, and stronger entropy of upto 2.06E-138, respectively.
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来源期刊
Microprocessors and Microsystems
Microprocessors and Microsystems 工程技术-工程:电子与电气
CiteScore
6.90
自引率
3.80%
发文量
204
审稿时长
172 days
期刊介绍: Microprocessors and Microsystems: Embedded Hardware Design (MICPRO) is a journal covering all design and architectural aspects related to embedded systems hardware. This includes different embedded system hardware platforms ranging from custom hardware via reconfigurable systems and application specific processors to general purpose embedded processors. Special emphasis is put on novel complex embedded architectures, such as systems on chip (SoC), systems on a programmable/reconfigurable chip (SoPC) and multi-processor systems on a chip (MPSoC), as well as, their memory and communication methods and structures, such as network-on-chip (NoC). Design automation of such systems including methodologies, techniques, flows and tools for their design, as well as, novel designs of hardware components fall within the scope of this journal. Novel cyber-physical applications that use embedded systems are also central in this journal. While software is not in the main focus of this journal, methods of hardware/software co-design, as well as, application restructuring and mapping to embedded hardware platforms, that consider interplay between software and hardware components with emphasis on hardware, are also in the journal scope.
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