Enhancing Analog IC Security Using Randomized Obfuscation Circuits

Abstract

With advances in technology scaling and globalization of the semiconductor industry, the vulnerability of analog integrated circuits (ICs) to reverse-engineering-based attacks, intellectual property theft, and unauthorized access has increased. Prior state-of-the-art analog deobfuscation techniques, such as those using genetic algorithms (GAs) and the satisfiability modulo theory, require an Oracle (i.e., unlocked IC) to recover the correct key. However, in some scenarios, an attacker present in an untrusted foundry might not have access to the Oracle. We demonstrate an Oracle-less attack using Bayesian optimization (BO) to retrieve the key of locked analog designs. To thwart both Oracle-guided and Oracle-less attacks, we present an automated obfuscation circuit generation framework for securing analog ICs. By employing randomness in obfuscation circuit generation, the proposed analog key-based methodology safeguards the integrity and reliability of analog ICs. Experimental results and security analysis for several analog designs demonstrate the robustness of the proposed technique to optimization attacks based on a GA and BO. We further show that the probability of guessing the correct key through brute force attack for an obfuscated analog circuit is negligibly small $(4.83\times 10^{-18})$ . The proposed obfuscation scheme incurs an area overhead of less than 1.3% and power overhead of less than 2.64% for a mixed-signal IC.