{"title":"Design Method of Power Chip Terminations With Lower Cost, Lower Voltage Standing Wave Ratio, and Broader Bandwidth","authors":"Hao Peng, Na Xue, Ziyan Qi, Lifeng Chen, Jiming Chen, Yu Liu, Serioja Ovidiu Tatu, Tao Yang, Jiadong Pan, Feng Zhang","doi":"10.1002/mop.70133","DOIUrl":null,"url":null,"abstract":"<div>\n \n <p>In this paper, we deeply explore a design method for power chip terminations with low-cost, low VSWR and broadband performance. Through a comprehensive investigation of existing power chip terminations, the electromagnetic leakage significantly impacts its performance. To address these issues, an electromagnetic constraint boundary has been introduced to enhance its VSWR. Considering the high cost of the gold plating process on the sides of chemical vapor deposition diamond substrates, an independent electromagnetic constraint metal carrier with a concave shape is proposed. TaN thin film is employed as the terminal matching load. Simulation results reveal that the VSWR of different substrates (ceramic and diamond substrates) are very similar. Consequently, this work presents a design, simulation, and measurement of a power chip termination applied to a ceramic substrate. Measurement results demonstrate that the VSWR is less than 1.5 over a frequency range of DC to 43.5 GHz, significantly outperforming existing commercial power chip terminations. In addition, the fluctuation of VSWR across the broadband operating frequencies has been discussed in detail.</p>\n </div>","PeriodicalId":18562,"journal":{"name":"Microwave and Optical Technology Letters","volume":"67 2","pages":""},"PeriodicalIF":1.0000,"publicationDate":"2025-02-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microwave and Optical Technology Letters","FirstCategoryId":"5","ListUrlMain":"https://onlinelibrary.wiley.com/doi/10.1002/mop.70133","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, we deeply explore a design method for power chip terminations with low-cost, low VSWR and broadband performance. Through a comprehensive investigation of existing power chip terminations, the electromagnetic leakage significantly impacts its performance. To address these issues, an electromagnetic constraint boundary has been introduced to enhance its VSWR. Considering the high cost of the gold plating process on the sides of chemical vapor deposition diamond substrates, an independent electromagnetic constraint metal carrier with a concave shape is proposed. TaN thin film is employed as the terminal matching load. Simulation results reveal that the VSWR of different substrates (ceramic and diamond substrates) are very similar. Consequently, this work presents a design, simulation, and measurement of a power chip termination applied to a ceramic substrate. Measurement results demonstrate that the VSWR is less than 1.5 over a frequency range of DC to 43.5 GHz, significantly outperforming existing commercial power chip terminations. In addition, the fluctuation of VSWR across the broadband operating frequencies has been discussed in detail.
期刊介绍:
Microwave and Optical Technology Letters provides quick publication (3 to 6 month turnaround) of the most recent findings and achievements in high frequency technology, from RF to optical spectrum. The journal publishes original short papers and letters on theoretical, applied, and system results in the following areas.
- RF, Microwave, and Millimeter Waves
- Antennas and Propagation
- Submillimeter-Wave and Infrared Technology
- Optical Engineering
All papers are subject to peer review before publication