Transfer learning-based parameter optimization for improved 3D NAND performance

Abstract

Process variation leads to variability in key device parameters such as plug separation, recess depth, epi-plug doping, and epi-plug height, which play a vital role in 3D NAND performance during scaling. Machine learning (ML) offers an alternate approach to predict and optimize performance by analyzing variable nonlinearity. However, in recent work, device optimization has been done over a narrow range, resulting in local rather than global optima. Additionally, these methods rely on extensive datasets, which increase costs and reduce the practicality of TCAD-ML models. This paper uses transfer learning to optimize the above parameters by integrating a long short-term memory (LSTM) model with the JAYA optimization algorithm. This approach considers a wide range of device parameters for optimization. By training on well-calibrated TCAD-generated data, we achieve an impressive accuracy rate of 98.5% in forecasting the values of threshold voltage (V_th), on current (I_on), subthreshold swing (SS), and transconductance (g_m). Our results reveal that the LSTM uses fewer datasets and outperforms feedforward neural networks with a performance improvement of 67%. Further, we achieve a mean-squared error of 0.217 using the JAYA optimization algorithm.