Optimization of read operation for low power consumption in 3D NAND flash memory

IF 2.6 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Microelectronic Engineering Pub Date : 2025-02-20 DOI:10.1016/j.mee.2025.112324
Jesun Park , Seongwoo Kim , Taeyoung Cho , Myounggon Kang
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Abstract

This study proposes a low power read operation to minimize the hot carrier injection (HCI) phenomenon that occurs during read operations in 3D NAND Flash Memory. Owing to the characteristics of the 3D NAND Flash Memory structure, the channels of unselected strings can easily remain in a floating state. This leads to HCI during read operations, resulting in read disturbances. To improve the read disturb characteristics, triangular pulse voltages (VTP) with adjusted slopes and delayed application times were applied to the string selected line (SSL) and the ground selected line (GSL) during read operations. Using the proposed read scheme, it was confirmed that HCI was decreased compared to the conventional method, and it was possible to operate at low power.
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来源期刊
Microelectronic Engineering
Microelectronic Engineering 工程技术-工程:电子与电气
CiteScore
5.30
自引率
4.30%
发文量
131
审稿时长
29 days
期刊介绍: Microelectronic Engineering is the premier nanoprocessing, and nanotechnology journal focusing on fabrication of electronic, photonic, bioelectronic, electromechanic and fluidic devices and systems, and their applications in the broad areas of electronics, photonics, energy, life sciences, and environment. It covers also the expanding interdisciplinary field of "more than Moore" and "beyond Moore" integrated nanoelectronics / photonics and micro-/nano-/bio-systems. Through its unique mixture of peer-reviewed articles, reviews, accelerated publications, short and Technical notes, and the latest research news on key developments, Microelectronic Engineering provides comprehensive coverage of this exciting, interdisciplinary and dynamic new field for researchers in academia and professionals in industry.
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