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Amorphous indium gallium zinc oxide thin film transistors (a-IGZO-TFTs): Exciting prospects and fabrication challenges
IF 2.6 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-02-08 DOI: 10.1016/j.mee.2025.112327
J. Ajayan , S. Sreejith , N. Aruna Kumari , M. Manikandan , Sachidananda Sen , Maneesh Kumar
In today's consumer electronics market, major manufacturing companies may be profitable and scalable thanks to technologies like thin-film transistors (TFTs). TFTs are found in TVs, smartphones, laptops, brain-like synaptic transistors, back-planes in CMOS image sensors, integrated circuits (ICs), flexible & wearable electronics, power switching circuits, back-end-of-line (BEOL) transistor elements in 3D-logic and cell transistors in dynamic random-access memory (DRAM). They have also been proposed as a potential solution for flexible CPUs. A high mobility of 74.4 cm2/Vs and ION/IOFF of 3.39 × 109 and a VON of less than ±0.1 V and a SS of less than 0.1 V/dec were achieved in a-IGZO based TFTs. Numerous efforts have been made to enhance the a-IGZO TFTs' electrical characteristics by optimizing the fabrication process. Numerous studies have also addressed the instability problems, such as the a-IGZO devices' hot-carrier effects, self-heating, and charge-trapping. TFTs with a-IGZO are being extensively studied adopting the a vertical-channel approach in order to be used in 3-D electronic devices. This article reviews the recent developments in materials and architectures, performance overview of IGZO-TFTs, advances and challenges in fabrication technologies and reliability issues & degradation mechanisms of IGZO-TFTs.
{"title":"Amorphous indium gallium zinc oxide thin film transistors (a-IGZO-TFTs): Exciting prospects and fabrication challenges","authors":"J. Ajayan ,&nbsp;S. Sreejith ,&nbsp;N. Aruna Kumari ,&nbsp;M. Manikandan ,&nbsp;Sachidananda Sen ,&nbsp;Maneesh Kumar","doi":"10.1016/j.mee.2025.112327","DOIUrl":"10.1016/j.mee.2025.112327","url":null,"abstract":"<div><div>In today's consumer electronics market, major manufacturing companies may be profitable and scalable thanks to technologies like thin-film transistors (TFTs). TFTs are found in TVs, smartphones, laptops, brain-like synaptic transistors, back-planes in CMOS image sensors, integrated circuits (ICs), flexible &amp; wearable electronics, power switching circuits, back-end-of-line (BEOL) transistor elements in 3D-logic and cell transistors in dynamic random-access memory (DRAM). They have also been proposed as a potential solution for flexible CPUs. A high mobility of 74.4 cm<sup>2</sup>/Vs and I<sub>ON</sub>/I<sub>OFF</sub> of 3.39 × 10<sup>9</sup> and a V<sub>ON</sub> of less than ±0.1 V and a SS of less than 0.1 V/dec were achieved in a-IGZO based TFTs. Numerous efforts have been made to enhance the a-IGZO TFTs' electrical characteristics by optimizing the fabrication process. Numerous studies have also addressed the instability problems, such as the a-IGZO devices' hot-carrier effects, self-heating, and charge-trapping. TFTs with a-IGZO are being extensively studied adopting the a vertical-channel approach in order to be used in 3-D electronic devices. This article reviews the recent developments in materials and architectures, performance overview of IGZO-TFTs, advances and challenges in fabrication technologies and reliability issues &amp; degradation mechanisms of IGZO-TFTs.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"298 ","pages":"Article 112327"},"PeriodicalIF":2.6,"publicationDate":"2025-02-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143372220","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Spin coating in semiconductor lithography: Advances in modeling and future prospects
IF 2.6 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-02-07 DOI: 10.1016/j.mee.2025.112326
Pan Liu , Liejie Huang , Chaoyi Zheng , Yanan Bao , Dawei Gao , Guodong Zhou
With the development of advanced integrated circuit technologies, semiconductor manufacturing processes have become increasingly important. Photolithography is one of the most critical and costly steps in chip manufacturing, and the quality of the photoresist film formed during the subprocess of spin-coating significantly impacts photolithography performance. The thickness of photoresist films ranges from several hundred nanometers to tens of micrometers, with uniformity requirements typically within ±1 %. These stringent specifications pose significant challenges to the stability and precision of the spin coating process. This review outlines the research progress on spin-coating and discusses various model-building methods, including theoretical analysis, experimentation, simulation, and machine learning. The paper highlights new experimental approaches and recent advancements aimed at optimizing the spin-coating process under different conditions.
{"title":"Spin coating in semiconductor lithography: Advances in modeling and future prospects","authors":"Pan Liu ,&nbsp;Liejie Huang ,&nbsp;Chaoyi Zheng ,&nbsp;Yanan Bao ,&nbsp;Dawei Gao ,&nbsp;Guodong Zhou","doi":"10.1016/j.mee.2025.112326","DOIUrl":"10.1016/j.mee.2025.112326","url":null,"abstract":"<div><div>With the development of advanced integrated circuit technologies, semiconductor manufacturing processes have become increasingly important. Photolithography is one of the most critical and costly steps in chip manufacturing, and the quality of the photoresist film formed during the subprocess of spin-coating significantly impacts photolithography performance. The thickness of photoresist films ranges from several hundred nanometers to tens of micrometers, with uniformity requirements typically within ±1 %. These stringent specifications pose significant challenges to the stability and precision of the spin coating process. This review outlines the research progress on spin-coating and discusses various model-building methods, including theoretical analysis, experimentation, simulation, and machine learning. The paper highlights new experimental approaches and recent advancements aimed at optimizing the spin-coating process under different conditions.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"298 ","pages":"Article 112326"},"PeriodicalIF":2.6,"publicationDate":"2025-02-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143314795","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimized fabrication of subwavelength slanted gratings via laser interference lithography and faraday cage-assisted etching
IF 2.6 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-01-26 DOI: 10.1016/j.mee.2025.112323
Zhiyuan Jiang, Xingzhi Zhang, Wei He, Kai Jiang, Liang Wang
Subwavelength slanted gratings are crucial components in devices such as augmented reality systems and optoelectronic sensors due to their high diffraction efficiency and compact design. However, their fabrication is often hindered by high costs and limited structural control. This paper presents a novel fabrication method that combines a laser interference lithography (LIL) process, optimized using a two-dimensional lithography simulation model, with a Faraday cage-assisted reactive ion etching (RIE) process. The simulation model integrates exposure intensity analysis under the standing wave effect with photoresist contrast curve characteristics, enabling accurate simulation of photoresist patterns and providing precise feedback on exposure time and the angle between exposure light beams to achieve precise control of key parameters, such as period and duty cycle. Compared to traditional models, it reduces complexity while delivering high accuracy. The LIL process optimized by this model achieves negligible period error and a duty cycle error 0.01. Faraday cage-assisted RIE further enhances control over grating height and tilt angle, achieving near-zero deviations. This scalable and cost-effective method provides a reliable solution for fabricating high-precision subwavelength slanted gratings, advancing their practical applications in sophisticated optical systems.
{"title":"Optimized fabrication of subwavelength slanted gratings via laser interference lithography and faraday cage-assisted etching","authors":"Zhiyuan Jiang,&nbsp;Xingzhi Zhang,&nbsp;Wei He,&nbsp;Kai Jiang,&nbsp;Liang Wang","doi":"10.1016/j.mee.2025.112323","DOIUrl":"10.1016/j.mee.2025.112323","url":null,"abstract":"<div><div>Subwavelength slanted gratings are crucial components in devices such as augmented reality systems and optoelectronic sensors due to their high diffraction efficiency and compact design. However, their fabrication is often hindered by high costs and limited structural control. This paper presents a novel fabrication method that combines a laser interference lithography (LIL) process, optimized using a two-dimensional lithography simulation model, with a Faraday cage-assisted reactive ion etching (RIE) process. The simulation model integrates exposure intensity analysis under the standing wave effect with photoresist contrast curve characteristics, enabling accurate simulation of photoresist patterns and providing precise feedback on exposure time and the angle between exposure light beams to achieve precise control of key parameters, such as period and duty cycle. Compared to traditional models, it reduces complexity while delivering high accuracy. The LIL process optimized by this model achieves negligible period error and a duty cycle error <span><math><mo>≤</mo><mn>0.01</mn></math></span>. Faraday cage-assisted RIE further enhances control over grating height and tilt angle, achieving near-zero deviations. This scalable and cost-effective method provides a reliable solution for fabricating high-precision subwavelength slanted gratings, advancing their practical applications in sophisticated optical systems.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"298 ","pages":"Article 112323"},"PeriodicalIF":2.6,"publicationDate":"2025-01-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143129837","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Unraveling the role of post-annealing in IGZO transistor for memory applications
IF 2.6 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-01-19 DOI: 10.1016/j.mee.2025.112322
Nayeon Kim , Jiae Jeong , Jae Woo Lee , Jiyong Woo
We demonstrate that post-annealing techniques are important for achieving the transfer characteristics of indium‑gallium‑zinc oxide (IGZO) transistors and identify that their role depends on the sputter-deposited IGZO film conditions. The as-fabricated transistor with a thin IGZO channel, HfO2 gate dielectric, and Mo gate electrode exhibits a constant drain current (IDS) over gate voltage (VGS). Although the oxygen (O2) plasma gas rate is adjusted from 0.2 to 1 sccm with an argon gas rate of 30 sccm during IGZO deposition, the IDS level was reduced by a factor of 104. Notably, VGS-controlled transfer behavior of the transistors only starts after post-annealing is performed at temperatures above 300 °C, regardless of which IGZO channel properties are used. More specifically, since oxygen vacancies (VOs) serve as carriers in the IGZO, annealing in different O2 gas or air environments to generate or reduce the number of VOs is found to be optimal for the VO-rich or VO-poor channels, respectively. In this study, we reveal that oxidation annealing appears to be a more effective way for achieving improved gate controllability (e.g., subthreshold swing). Accordingly, we further analyze how the VOs in the IGZO are involved in switching by examining the effect of annealing temperature and gate dielectric materials on the transfer curve. These results indicate that VOs in the bulk need to be annihilated to lower the off-state IDS, while a sufficient number of VOs near the channel and gate dielectric interface should be ensured to responded by VGS for rapid switching.
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引用次数: 0
Low temperature solid-state diffusion bonding of fine pitch Cu/Sn micro-bumps assisted with formic acid vapor for 3D integration
IF 2.6 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-01-17 DOI: 10.1016/j.mee.2025.112319
Hanlin Wan , Qian Wang , Jian Cai , Dejun Wang
Low-temperature solid-state diffusion (SSD) bonding of 5 μm diameter Cu/Sn micro-bumps was achieved with the assistance of formic acid vapor. Efforts were made to overcome surface oxidation of copper and uneven tin morphology, which are two major challenges in SSD bonding. Formic acid vapor was used as pre-treatment gas before bonding and protection gas during bonding. The results demonstrated that formic acid vapor is highly effective in removing surface oxidation on copper and preventing secondary oxidation, thereby facilitating a strong bond. Temperatures of 160 °C and 200 °C in 120 s were identified as ideal for pre-treatment. In SSD thermal compression bonding, 30 MPa TCB pressure was found to be necessary to overcome the uneven tin morphology. Other bonding parameters were also optimized, achieving a die shear strength of up to 59 MPa while reducing bonding temperature and time to 150 °C and 10 min. As bump scale shrinks, the interface analysis revealed a unique “teeth-like” structure in the bonding interface, contributing to improved shear strength due to intermetallic compound (IMC) growth and a favorable stress distribution. The assistance of formic acid vapor and the optimization of bonding parameters enhances the likelihood of future applications of solid-state bonding in industry, which could be an alternative choice for fine-pitch micro-bump bonding application.
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引用次数: 0
Fabrication of industrial grade GMR multilayer magnetic sensors for non-recording applications
IF 2.6 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-01-11 DOI: 10.1016/j.mee.2024.112311
Bhagaban Behera, Umesh P. Borole, Jakeer Khan, Harish C. Barshilia, P. Chowdhury
Giant Magnetoresistance (GMR) technology is now becoming a popular choice in the industrial market for non-recording applications (sensor applications). In these applications, the sensor's characteristics need to be engineered for high linearity, reversibility, and high thermal stability. Among two different types of GMR technologies, such as GMR-multilayer (GMR-ML) and GMR- spin valves (GMR-SV), an attempt was made to fabricate a sensing element with high throughput based on GMR-ML due to its cost-effectiveness and relatively higher dynamic field range. Further, sensor was used as linear sensor in both omni-polar (i.e. by default) as well as bipolar (i.e. biased with permanent magnet for converting omfig ni-polar characteristics to bipolar characteristics). A detailed pilot scale fabrication of a GMR sensor with a yield of 88 % on a 4-in. wafer was presented. All the products developed using GMR-ML were evaluated in the real-time applications environment.
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引用次数: 0
Ultrasharp periodic AlN nanotips formed via purely subtractive nanofabrication
IF 2.6 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-01-11 DOI: 10.1016/j.mee.2025.112312
Robert Fraser Armstrong , Philip Aldam Shields
Ultrasharp periodic AlN structures hold promise for applications such as the housing of site-controlled quantum dots and field emission structures. Etching could be an effective route to achieve this since it avoids the genera- tion of unwanted point defects resulting from dry etching or regrowth under unoptimised conditions. However, exploration of wet etching of AlN to create uniform arrays of periodic nanostructures has thus far been limited. In this paper, a combination of initial dry etching of a 2D AlN template followed by wet chemical etching is performed to reveal periodic arrays of nanostructures. A study of different initial dry etched structures and wet etching times were performed resulting in periodic arrays of ultrasharp AlN nanopyramids. It was discovered that potentially unconventional inclined facets were realised. A model to describe the dynamics of the wet etching on the dry etched nanostructures is also proposed.
{"title":"Ultrasharp periodic AlN nanotips formed via purely subtractive nanofabrication","authors":"Robert Fraser Armstrong ,&nbsp;Philip Aldam Shields","doi":"10.1016/j.mee.2025.112312","DOIUrl":"10.1016/j.mee.2025.112312","url":null,"abstract":"<div><div>Ultrasharp periodic AlN structures hold promise for applications such as the housing of site-controlled quantum dots and field emission structures. Etching could be an effective route to achieve this since it avoids the genera- tion of unwanted point defects resulting from dry etching or regrowth under unoptimised conditions. However, exploration of wet etching of AlN to create uniform arrays of periodic nanostructures has thus far been limited. In this paper, a combination of initial dry etching of a 2D AlN template followed by wet chemical etching is performed to reveal periodic arrays of nanostructures. A study of different initial dry etched structures and wet etching times were performed resulting in periodic arrays of ultrasharp AlN nanopyramids. It was discovered that potentially unconventional inclined facets were realised. A model to describe the dynamics of the wet etching on the dry etched nanostructures is also proposed.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"298 ","pages":"Article 112312"},"PeriodicalIF":2.6,"publicationDate":"2025-01-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143129833","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Application of atomic force microscopy technology in doping characterization of semiconductor materials and devices
IF 2.6 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-12-30 DOI: 10.1016/j.mee.2024.112310
Xiaomeng Liu, Xiangsheng Wang, Xinyou Liu, Yanpeng Song, Yiwen Zhang, Hailing Wang, Ying Zhang, Guilei Wang, Chao Zhao
The precise characterization of the doping profile is crucial for optimizing the performance and structural integrity of semiconductor devices. As the size of semiconductor devices continues to diminish, the need of precise characterization of doping profiles has become increasingly urgent. Atomic Force Microscopy (AFM) has become a promising technique for doping profile characterization within the semiconductor field, owing to its high spatial resolution, multidimensional feature analysis, and flexibility in various working environments. Based on AFM technology, various techniques have been developed for doping characterization, such as scanning capacitance microscope (SCM), scanning spreading resistance microscope (SSRM) and scanning microwave impedance microscope (sMIM). In this work, we systematically review the application of these three techniques for doping characterization and summarize their strengths and limitations. Furthermore, we also evaluate their capability in characterizing the doping profiles of miniature devices with three-dimensional (3D) architectures. This work offers feasible approaches for advanced semiconductor device manufacturing.
© 2012 Published by Elsevier Ltd. Selection and/or peer-review under responsibility of Global Science and Technology Forum Pte Ltd.
{"title":"Application of atomic force microscopy technology in doping characterization of semiconductor materials and devices","authors":"Xiaomeng Liu,&nbsp;Xiangsheng Wang,&nbsp;Xinyou Liu,&nbsp;Yanpeng Song,&nbsp;Yiwen Zhang,&nbsp;Hailing Wang,&nbsp;Ying Zhang,&nbsp;Guilei Wang,&nbsp;Chao Zhao","doi":"10.1016/j.mee.2024.112310","DOIUrl":"10.1016/j.mee.2024.112310","url":null,"abstract":"<div><div>The precise characterization of the doping profile is crucial for optimizing the performance and structural integrity of semiconductor devices. As the size of semiconductor devices continues to diminish, the need of precise characterization of doping profiles has become increasingly urgent. Atomic Force Microscopy (AFM) has become a promising technique for doping profile characterization within the semiconductor field, owing to its high spatial resolution, multidimensional feature analysis, and flexibility in various working environments. Based on AFM technology, various techniques have been developed for doping characterization, such as scanning capacitance microscope (SCM), scanning spreading resistance microscope (SSRM) and scanning microwave impedance microscope (sMIM). In this work, we systematically review the application of these three techniques for doping characterization and summarize their strengths and limitations. Furthermore, we also evaluate their capability in characterizing the doping profiles of miniature devices with three-dimensional (3D) architectures. This work offers feasible approaches for advanced semiconductor device manufacturing.</div><div>© 2012 Published by Elsevier Ltd. Selection and/or peer-review under responsibility of Global Science and Technology Forum Pte Ltd.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"297 ","pages":"Article 112310"},"PeriodicalIF":2.6,"publicationDate":"2024-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143128952","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A simulation study of grayscale ice lithography for spiral phase plates in near infrared wavelengths
IF 2.6 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-12-26 DOI: 10.1016/j.mee.2024.112308
Kangping Liu , Jinyu Guo , Shuoqiu Tian , Wentao Yuan , Ding Zhao , Rui Zheng , Yifang Chen , Min Qiu
Grayscale electron beam lithography (EBL) in amorphous solid water (ASW), known as ice lithography (IL), and in Polymethylmethacrylate (PMMA), respectively, for spiral phase plates (SPPs) are numerically simulated by using commercial software: Beamer, Tracer and Lab, aiming at characterizing the two lithography methods for three-dimensional nanostructures. It is found that IL is able to generate 3D SPP profiles with smoother surface than conventional EBL. Further simulation using finite difference time domain (FDTD) method is also conducted to investigate the effect of the surface roughness on the wavefront characteristics of the transformed vortex beams. Clear influence on the light regulation ability by surface roughness is found through comparison between ASW-based and PMMA-based SPPs, indicating that IL has better performance than conventional EBL in patterning 3D SPP structures. This research indicates that IL should be prospective for manufacturing high-quality micro and nanostructures with 3D profiles for modern optical devices.
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引用次数: 0
Multiple Aztec steps as an angle resolved micro-spectrometer by grayscale ice lithography
IF 2.6 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-12-25 DOI: 10.1016/j.mee.2024.112309
Jinyu Guo , Kangping Liu , Shuoqiu Tian , Wentao Yuan , Hao Quan , Qiucheng Chen , Qingxin Wu , Rui Zheng , Ding Zhao , Yifang Chen , Min Qiu
For decades, Aztec steps have been widely attained because of the potential application as an angle-resolved micro-spectroscope. However, the challenge in replicating multiple steps with less than 1 nm precision hinders the Aztec steps to be commercialized. Although grayscale electron beam lithography (G-EBL) on PMMA (polymethyl methacrylate) has been tried but the surface roughness as well as the flatness still remains a big issue. This work evaluates the grayscale e-beam lithography in amorphous solid water (ASW), nicknamed as ice lithography, for Aztec steps by numerical simulation based on Monte Carlo algorithm. For comparison, grayscale electron beam lithography in PMMA was included in the simulation. Furthermore, simulation using finite difference and time domain (FDTD) method was also carried out to theoretically characterize the angle-resolved spectra by the numerically modeled Aztec steps in ASW and PMMA, respectively. Our results show that grayscale ice lithography on ASW is able to replicate Aztec steps with much smother surface and better flatness than that on PMMA, giving rise to significantly improved spectral resolution.
{"title":"Multiple Aztec steps as an angle resolved micro-spectrometer by grayscale ice lithography","authors":"Jinyu Guo ,&nbsp;Kangping Liu ,&nbsp;Shuoqiu Tian ,&nbsp;Wentao Yuan ,&nbsp;Hao Quan ,&nbsp;Qiucheng Chen ,&nbsp;Qingxin Wu ,&nbsp;Rui Zheng ,&nbsp;Ding Zhao ,&nbsp;Yifang Chen ,&nbsp;Min Qiu","doi":"10.1016/j.mee.2024.112309","DOIUrl":"10.1016/j.mee.2024.112309","url":null,"abstract":"<div><div>For decades, Aztec steps have been widely attained because of the potential application as an angle-resolved micro-spectroscope. However, the challenge in replicating multiple steps with less than 1 nm precision hinders the Aztec steps to be commercialized. Although grayscale electron beam lithography (G-EBL) on PMMA (polymethyl methacrylate) has been tried but the surface roughness as well as the flatness still remains a big issue. This work evaluates the grayscale e-beam lithography in amorphous solid water (ASW), nicknamed as ice lithography, for Aztec steps by numerical simulation based on Monte Carlo algorithm. For comparison, grayscale electron beam lithography in PMMA was included in the simulation. Furthermore, simulation using finite difference and time domain (FDTD) method was also carried out to theoretically characterize the angle-resolved spectra by the numerically modeled Aztec steps in ASW and PMMA, respectively. Our results show that grayscale ice lithography on ASW is able to replicate Aztec steps with much smother surface and better flatness than that on PMMA, giving rise to significantly improved spectral resolution.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"297 ","pages":"Article 112309"},"PeriodicalIF":2.6,"publicationDate":"2024-12-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143129033","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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Microelectronic Engineering
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