Suppression of Drain-Bias-Induced VTH Instability in Schottky-Type p-GaN Gate HEMTs With Voltage Seatbelt

Abstract

A cost-effective yet efficient approach is proposed for suppressing the drain-bias-induced threshold voltage ( ${V} _{\text {TH}}$ ) instability in Schottky-type p-gallium nitride (GaN) gate high electron mobility transistors (HEMTs). The proposed device consists of a source-connected metal layer on a dielectric layer in the gate-to-drain access region, which operates as a voltage seatbelt that restricts the voltage coupling to the p-GaN region from the drain within a defined range. By adjusting the dielectric thickness in the proposed structure, the voltage potential experienced by the p-GaN region is confined within a range of 3.1–22.3 V at a drain voltage ( ${V} _{\text {DS}}$ ) of 400 V. In the scenario with a 3.1-V clamping voltage, the proposed configuration demonstrates a remarkable reduction of over 95% in ${V} _{\text {TH}}$ shift caused by the floating nature of p-GaN, along with a reduction of 88% in ${V} _{\text {TH}}$ shift induced by trapping effects. The proposed structure also enhances short-circuit robustness by reducing the saturation current density, while exerting only a minimal effect on the devices’ on-resistance ( ${R} _{\text {ON}}$ ). The proposed structure offers room for balancing the tradeoff between the ${R} _{\text {ON}}$ and the short-circuit robustness in practical applications.