Decoupling Current Ripple in PHIL PMSM Emulation Using LCL Filter: A Fundamental Frequency Analysis

Abstract

The traditional machine test benches are known for their inflexibility, safety concerns, weight, and cost. The adoption of Power Hardware-in-the-Loop (PHIL) has been appearing as an enhanced technique to test and validate control algorithms and hardware of Variable Speed Drives (VSDs) for electrical machines. This paper presents the use of the PHIL for the emulation of a Permanent Magnet Synchronous Machine (PMSM) using an LCL coupling network with voltage control. The principle of operation, modeling and control structures are presented in detail. The presented strategy allows the Electrical Machine Emulator (EME) to decouple the low fundamental frequency of the machine from the high frequency (current ripple) of the Device Under Test (DUT) during its operation. The use of different inductances for the reproduction of a machine with a fixed synchronous inductance is addressed in detail, besides the consequences on the current ripple. The theoretical work is supported and validated through experimental tests using an FPGA-Based Real Time Simulator and dedicated control boards (PED-Board).