Rich dynamics and analog implementation of a Hopfield neural network in integer and fractional order domains

IF 2.2 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE Integration-The Vlsi Journal Pub Date : 2025-03-05 DOI:10.1016/j.vlsi.2025.102389
Diego S. de la Vega , Jesus M. Munoz-Pacheco , Olga G. Félix-Beltrán , Christos Volos
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Abstract

Several synaptic weight matrices have been proposed for Hopfield neural network (HNN) models, where chaotic dynamics may arise. Contrary to those works, this manuscript aims to present a synaptic weight matrix where every entry can be set as an integer, harvesting an elegant chaotic HNN from a chaos theory point of view. Analytical and numerical analyses such as equilibrium points, bifurcation diagrams, Lyapunov exponents, and basins of attraction demonstrate that the proposed HNN exhibits complex behaviors across a wide range of parameter values. Also, we extend the study of the HNN into the fractional order domain. Moreover, the design and implementation details of the proposed neural network using field programmable analog arrays (FPAAs) are thoroughly discussed. This includes the various components and their configurations, highlighting how they contribute to the overall functionality of the neural network. As a result, we found a strong correlation between numerical simulations and SPICE circuit simulations.
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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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