Design of an 11-bit Column-Parallel ADC for Monolithic Active Pixel Sensor

Abstract

The monolithic active pixel sensor (MAPS) has been widely used in nuclear and particle physics. The various physics and applications at the Heavy-Ion Research Facility in Lanzhou (HIRFL) and the High-Intensity Heavy-Ion Accelerator Facility (HIAF) require the MAPS to measure particle hit position, energy deposition, and arrival time. As the critical part of the MAPS with such capability, a column-parallel analog-to-digital converter (ADC) has been designed to convert the analog signal from the pixels into a digital signal. To meet the strict constraints on power and area consumption, this ADC uses cyclic architecture and removes the sample-and-hold amplifier (SHA). In addition, a novel multiplying digital-to-analog converter (MDAC) with two residue generators is proposed. This implementation reuses the load capacitor as an extra residue generator, removing the internal sampling phase and doubling the time reserves on residue voltage settling. Each column-parallel ADC covers an area of only $60 \times 670 \; \mu $ m2 and consumes low power of 3.33 mW with a 3.3-V power supply. This ADC achieves an effective number of bits (ENOBs) of ~9.3 bits at the sampling rate of 1 MSps, with the signal-to-noise and distortion (SINAD) of 57.74 dB.