Design of a Readout Chip for Pixel Silicon Detector With Event-Driven Readout Method

Abstract

This article presents a low-noise pixel readout chip designed for pixel silicon detectors used in the autonomous navigation of spacecraft through X-ray pulsars and X-ray imaging applications. The pixel readout chip, fabricated in CMOS 130 nm, has $5\times 5$ mm dimensions. The core of the IC is a matrix of $40\times 50$ pixels with an $80\times 80~\mu $ m pixel size. Each pixel consists of a charge-sensitive amplifier (CSA), a comparator, two data hold circuits, a threshold trimming 3-bit digital-to-analog converter (DAC), and a digital readout circuit. The readout chip is optimized for collecting holes in this state, but it allows the processing of detector signals of both polarities (holes or electrons) through the control signal. When the pMOS feedback transistor of the CSA is selected, the gain of the pixel is about 32 mV/ke- and the nonlinearity of the entire matrix of pixels is not worse than 6% of the pMOS feedback of the CSA in the hole collection type. The pixel-to-pixel offset spread of the pixel matrix before correction is about $\sigma = 14.39$ mV rms, and it was reduced to $\sigma = 2.59$ mV rms (equivalent to the input charge of 58 e- rms with the nominal gain taken into account) after correction by trim DAC. The equivalent noise charge (ENC) of the pixels of the readout chip is about 43 e- rms. The time of arrival (TOA) is within 137 ns for pulses larger than 1.6 ke-.