A Novel Metal-Bridging Free Lift-Off Process for Fabricating High-Performance Sub-100-nm Gate Length MoS₂ Transistors

IF 3.2 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Electron Devices Pub Date : 2025-02-10 DOI:10.1109/TED.2025.3537064
Yun-Cheng Chang;Yuan-Chun Su;Hsiang-Chi Hu;Jian-Chen Tsai;Chih-Yao Shih;Chun-Jung Su;Pei-Wen Li;Wen-Hao Chang;Horng-Chih Lin
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Abstract

A novel approach for fabricating molybdenum disulfide (MoS2) transistors with sub-100-nm gate length is reported. Unlike the traditional lift-off process, the photoresist (PR) is not in contact with the MoS2 channel, while the metal deposited in the source/drain (S/D) areas is not bridged with that on PR through the PR sidewalls. A sacrificial oxide layer between the channel and the PR enables the two distinct features, which are done after generating the PR pattern that defines the S/D regions, selectively removing the sacrificial oxide to suspend the PR between the source and drain regions. When metal is subsequently deposited, the metal on the PR will naturally disconnect from that in the S/D regions due to the air gap between the PR and the channel. The new metal-bridging-free process frees the fabricated devices from many issues encountered in the traditional lift-off process. Besides, we combined the I-line photolithography and a novel PR trimming technique to demonstrate the feasibility of this approach in fabricating nanometer-scaled devices with high throughput. The fabricated MoS2 transistors with Au contacts exhibit S/D series resistance of 2.4 k $\Omega $ - $\mu $ m.
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用于制造高性能亚 100 纳米栅极长度 MoS₂晶体管的新型无金属桥接提升工艺
报道了一种制备栅极长度低于100纳米的二硫化钼晶体管的新方法。与传统的剥离工艺不同,光刻胶(PR)不与MoS2通道接触,而沉积在源/漏极(S/D)区域的金属不会通过PR侧壁与PR上的金属桥接。通道和PR之间的牺牲氧化物层实现了两种不同的特征,这是在生成定义S/D区域的PR模式后完成的,选择性地去除牺牲氧化物以悬浮源和漏极区域之间的PR。当金属随后沉积时,由于PR和通道之间的气隙,PR上的金属将自然地与S/D区域的金属分离。这种新型无金属桥接工艺使制造的器件摆脱了传统升空工艺中遇到的许多问题。此外,我们将i线光刻技术与一种新的PR切边技术相结合,证明了这种方法在制造高通量纳米级器件方面的可行性。所制备的具有Au触点的MoS2晶体管的S/D串联电阻为2.4 k $\Omega $ - $\mu $ m。
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来源期刊
IEEE Transactions on Electron Devices
IEEE Transactions on Electron Devices 工程技术-工程:电子与电气
CiteScore
5.80
自引率
16.10%
发文量
937
审稿时长
3.8 months
期刊介绍: IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.
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