Design of a gate-all-around arch-shaped tunnel-field-effect-transistor-based capacitorless DRAM

Abstract

In this study, we designed and analyzed a single-transistor dynamic random-access memory (1 T-DRAM) based on an arch-shaped gate-all-around tunnel field-effect transistor (GAA ARCH-TFET), featuring an Si/SiGe heterostructure, for high-density memory applications. Unlike conventional 1 T-DRAM, which relies on the electric-field-driven movement of charge carriers through a channel for the read operation, the GAA ARCH-TFET 1 T-DRAM utilizes band-to-band tunneling. The GAA structure improves scalability, making it suitable for high-density memory applications. This capacitorless GAA ARCH-TFET 1 T-DRAM cell demonstrates both superior performance and low energy consumption. The arch-shaped design expands the tunneling area, while the Si/SiGe heterostructure forms a quantum well that further enhances memory performance. The effects of key parameters, including source height, channel height, and germanium composition, on device behavior are examined. Simulation results reveal that the GAA ARCH-TFET 1 T-DRAM achieves a high current ratio of read “1” to read “0” (10⁸) and a retention time exceeding 1 s at 358 K. These characteristics suggest that the proposed device holds potential as a DRAM replacement in various applications.