A 6.4GΩ-Input-Impedance 104.5dB-CMRR 96dB-DR DD-AFE With Tri-Level IDAC for Small-Diameter Dry-Electrode Interfaces

Yijie Li;Yuxiang Tang;Jianhong Zhou;Tianxiang Qu;Zhiliang Hong;Jiawei Xu
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Abstract

This article presents a direct-digitization analog front end (DD-AFE) with enhanced input-impedance, common-mode rejection ratio (CMRR), and dynamic range (DR) for wearable biopotential (ExG) signal acquisition, especially for small-diameter dry electrodes. The DD-AFE employs a second-order continuous-time delta-sigma modulator (CT-ΔΣM) and multiple circuit techniques to support direct-digitization readouts. These include 1) A high input-impedance input feedforward (FF), embedded in a 4-input 4-bit successive approximation register (SAR) quantizer. This allows two integrators to adopt a compact and energy-efficient Gm-C structure, and improves stability and linearity, resulting in a 6.6dB increase in DR, 42dB increase in SQNR at peak input and a unity-gain signal transfer function (STF) with a gain flatness of 0.04%. 2) A fixed-voltage dead-band assisted tri-level current-steering DAC (IDAC). It not only increases the DR and CMRR of the DD-AFE but also eliminates the harmonic distortion induced by tri-level dynamic element matching (DEM). 3) A high-gain two-stage Gm-boosting inverter-based OTA with embedded low-frequency chopping. The former largely improves linearity and CMRR, while the latter mitigates 1/f noise without compromising the input impedance. Fabricated in a 0.18-µm CMOS process, this DD-AFE achieves 6.4GΩ input impedance and 104.5dB CMRR at 50Hz, as well as 90.4dB peak SNDR, 96dB DR, and up to 425mVPP linear input range.
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6.4GΩ-Input-Impedance 104.5dB-CMRR 96dB-DR DD-AFE三电平IDAC用于小直径干电极接口。
本文提出了一种直接数字化模拟前端(DD-AFE),具有增强的输入阻抗,共模抑制比(CMRR)和动态范围(DR),用于可穿戴生物电位(ExG)信号采集,特别是小直径干电极。DD-AFE采用二阶连续时间δ - σ调制器(CT-ΔSM)和多电路技术来支持直接数字化读出。这些包括1)一个高输入阻抗输入前馈(FF),嵌入在一个4输入4位连续逼近寄存器(SAR)量化器中。这使得两个积分器采用紧凑节能的Gm-C结构,并提高了稳定性和线性度,从而使DR增加6.6dB,峰值输入时SQNR增加42dB,增益平坦度为0.04%的单位增益信号传递函数(STF)。2)一种定压死带辅助三电平电流转向DAC (IDAC)。它不仅提高了DD-AFE的DR和CMRR,而且消除了三电平动态单元匹配(DEM)引起的谐波失真。3)基于嵌入式低频斩波的高增益两级gm升压逆变器OTA。前者在很大程度上提高了线性度和CMRR,而后者在不影响输入阻抗的情况下减轻了1/f噪声。该DD-AFE采用0.18 μm CMOS工艺制造,在50Hz时实现6.4GΩ输入阻抗和104.5dB CMRR,以及90.4dB峰值SNDR, 96dB DR和高达425mVPP的线性输入范围。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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